A display device includes: a display panel including a plurality of pad electrodes arranged in a first direction; a printed circuit board including a plurality of lead electrodes facing the plurality of pad electrodes, respectively; a plurality of conductive particles disposed between the display panel and the printed circuit board at predetermined intervals; and a coating layer disposed on the plurality of conductive particles and having a thickness varying in the first direction from each of the plurality of lead electrodes toward each of the plurality of pad electrodes.

An interposer for a processor includes: an electrically insulating material having a first main side and a second main side opposite the first main side; an electrical interface for a processor substrate at the first main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material to a lower voltage. The power device module has at least one contact configured to receive the voltage provided at the second main side of the electrically insulating material. Distribution circuitry embedded in the electrically insulating material is configured to carry the lower voltage provided by the power device module to the first main side of the electrically insulating material.

A fabrication method achieves bump bonds (to connect two electronic devices) with a pitch of less than 20 μm using UV-curable conductive epoxy resin cured with an array of nano-LEDs. Nano-LEDs are devices with sizes less than or equal to 5 μm, typically arranged in an array. After deposition of the uncured conductive epoxy layer, the nano-LED array enables a fast curing of the bumps with high spatial resolution. Next, the uncured resin is washed off and the chips are assembled, before final thermal curing takes place.

A coated particle according to the present invention is a coated particle containing a conductive metal-coated particle having a metal film formed on a surface of a core material, the conductive metal-coated particle coated with an insulation layer containing a polymer, wherein the insulation layer has a phosphonium group. The insulation layer preferably contains an insulating fine particle and the fine particle has a phosphonium group on a surface thereof, or the insulation layer is preferably a film having a phosphonium group. In addition, the metal is preferably at least one selected from nickel, gold, nickel alloys, and gold alloys. The polymer constituting the insulation layer is preferably at least one polymerized product selected from styrenes, esters, and nitriles.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

A processor substrate includes: an electrically insulating material having a first main side and a second main side opposite the first main side; a plurality of electrically conductive structures embedded in the electrically insulating material and configured to provide an electrical interface at the first main side of the electrically insulating material and to provide electrical connections from the electrical interface to the second main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material and which exceeds a voltage limit of the processor substrate to a voltage that is below the voltage limit of the processor substrate. An electronic system that includes the processor substrate is also described.

An interposer for a processor includes: an electrically insulating material having a first main side and a second main side opposite the first main side; a plurality of electrically conductive structures embedded in the electrically insulating material and configured to provide an electrical interface for a processor substrate at the first main side of the electrically insulating material and to provide electrical connections from the electrical interface to the second main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material to a lower voltage at the first main side of the electrically insulating material.

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member; and curing the first composite and the second composite.

An anisotropic conductive film in which conductive particles are disposed in an insulating resin layer has a particle disposition of the conductive particles such that a first orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in an a direction at a predetermined pitch, in a b direction inclined with respect to the a direction at an angle, and a second orthorhombic lattice region being formed by arranging a plurality of arrangement axes of the conductive particles, disposed in the a direction at a predetermined pitch, in a c direction obtained by inverting the b direction with respect to the a direction are repeatedly disposed. Regardless of the shape of the terminal arrangements and the materials of electronic components, a good conduction state is ensured while the respective terminals hold conductive particles. Further, the occurrence of a short circuit is prevented.

The invention relates to a process of fabricating a beaded path on the surface of a substrate, the process comprising: preparing a dispersion of particles in a liquid; supplying the prepared dispersion to at least one electrically conductive microcapillary in a continuous manner; forming and maintaining a convex meniscus of the dispersion at the outlet end of the microcapillary positioned above and/or below the surface of a substrate; applying alternating voltage to the microcapillary so that a beaded structure is formed between the dispersion meniscus and the surface of the substrate; and moving the microcapillary relative to the substrate and/or the substrate relative to the microcapillary so as to deposit the particles of the formed beaded structure on the surface of the substrate and simultaneously rebuild the beaded structure formed between the dispersion meniscus and the surface of a substrate. The invention also relates to a system for realizing this process and the use of the beaded path fabricated in accordance with the process of the invention for the production of electrodes in photovoltaic cells, new generation clothing, electronic components, including flexible electronics, artificial flagella, photonic and optomechanical materials, as well as for the regeneration of damaged paths on the surface of a substrate. The present invention also relates to a kit comprising a substrate and a beaded path fabricated on the surface of that substrate according to this process. The invented process is simple, efficient, hence economical, and enables fabricating beaded paths that retain their properties after turning off the voltage initially used to form a beaded structure. Moreover, the process occurs outside a liquid environment and enables fabricating of paths in a continuous manner, that is, through the formation of the beaded structure and its simultaneous depositing on the surface of a substrate allowing the fabrication of beaded paths of arbitrary length.