A manufacturing method for a multi-layer circuit board is provided. According to the multi-layer circuit board manufactured by the manufacturing method, the multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer, the delivery loading plate and the patterned metal interface layer expose the conductive corrosion-barrier layer, and the top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. Therefore, before the multi-layer circuit board is delivered to the assembly company or before the multi-layer circuit board is packaged with chips, an electrical testing can be applied to the multi-layer circuit board to check if the multi-layer circuit board can be operated normally or not.

A multi-layer circuit board capable of being applied with electrical testing includes a patterned metal-interface layer, a metallic delivery loading plate, an electrical connection layer, a conductive corrosion-barrier layer, a bottom dielectric layer, and a multi-layer circuit structure. The multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer. The top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. The delivery loading plate and the patterned metal-interface layer expose the conductive corrosion-barrier layer. Therefore, before the multi-layer circuit board is packaged, an electrical testing can be applied to the multi-layer circuit board to check if it can be operated normally. Hence, costs for figuring out reasons of the unqualified electronic component can be reduced, and responsibilities for the unqualified electrical testing result of the electronic component can be clarified.

A method for manufacturing such multilayer printed circuit board includes providing a metal laminated structure including a first type metal layer and a second type metal layer, pressing a patterned dry film layer and a protective film layer on two surfaces of the metal laminated structure, the dry film layer exposing the second type metal layer; etching the second type metal layer to form a first conductive circuit layer; etching a first type metal layer to form a second conductive circuit layer, the first conductive circuit layer and the second conductive circuit layer defining an inner circuit laminated structure; removing the dry film layer; and forming a first adding-layer circuit base board and a second adding-layer circuit base board on two surfaces of the inner laminated structure.

Provided are a multilayer board and a method for manufacturing same, in which a different kind of metal layer is formed between an upper metal layer and an interlayer insulating layer, the different kind of metal layer being formed only in a wiring area without being formed in a via area. The multilayer board comprises: a substrate layer; a plurality of first metal layers sequentially stacked on the substrate layer; an interlayer insulating layer formed between two different first metal layers, having a first via hole, and electrically connecting the two different first metal layers through a third metal layer formed in the first via hole; and a second metal layer formed between the upper layer of the two different first metal layers and the interlayer insulating layer.

A ceramic carrier substrate for an electrical/electronic circuit. The substrate includes ceramic layers arranged one above the other in an interconnected structure and conductor tracks arranged on and/or in individual ceramic layers and connected to one another as the conductor structure for the electrical/electronic circuit. The interconnected structure is formed by a firing operation. A first conductor substructure is formed in a first interconnected structure subassembly which comprises at least one of the ceramic layers, and a second conductor substructure is formed in a second interconnected structure subassembly which is directly adjacent to the first interconnected structure subassembly and comprises at least one of the ceramic layers. The second conductor substructure substantially consists of high-current conductor tracks and is configured to contact a power circuit. The first conductor substructure substantially consists of signal conductor tracks and is configured to contact a drive circuit for the power circuit.

A circuit substrate includes a dielectric layer, a first conductive structure and a second conductive structure. The first conductive structure includes a first conductive circuit and a first conductive via. The first conductive circuit is disposed on the dielectric layer. The first conductive via is disposed in the dielectric layer, and the first conductive circuit is connected to the first conductive via. The second conductive structure includes a second conductive circuit and a second conductive via. The second conductive circuit is disposed in the dielectric layer, the second conductive circuit and the first conductive circuit of the first conductive structure are arranged with an interval, and the second conductive via surrounds the first conductive via with an interval. The second conductive structure has an extending portion. The extending portion protrudes toward the first conductive via and does not contact the first conductive via.

Methods of fabricating tamper-respondent electronic circuit structures and electronic assembly packages are provided which include, at least in part, a tamper-respondent sensor including one or more formed flexible layers of, for instance, a dielectric material, having opposite first and second sides, and circuit lines defining at least one resistive network. The circuit lines are disposed on at least one of the first side or the second side of the formed flexible layer(s). The formed flexible layer(s) with the circuit lines includes curvatures, and the circuit lines overlie, at least in part, the curvatures of the formed flexible layer(s). In certain embodiments, the formed flexible layer(s) may be one or more corrugated layers or one or more flattened, folded layers.

A multi-layer circuit board capable of being applied with electrical testing includes a patterned metal-interface layer, a metallic delivery loading plate, an electrical connection layer, a conductive corrosion-barrier layer, a bottom dielectric layer, and a multi-layer circuit structure. The multi-layer circuit structure is disposed on the delivery loading plate through the bottom dielectric layer. The top-layer circuit of the multi-layer circuit structure is electrically connected to the conductive corrosion-barrier layer through the bottom-layer circuit and the electrical connection layer. The delivery loading plate and the patterned metal-interface layer expose the conductive corrosion-barrier layer. Therefore, before the multi-layer circuit board is packaged, an electrical testing can be applied to the multi-layer circuit board to check if it can be operated normally. Hence, costs for figuring out reasons of the unqualified electronic component can be reduced, and responsibilities for the unqualified electrical testing result of the electronic component can be clarified.

Tamper-respondent electronic circuit structures, electronic assembly packages, and methods of fabrication are provided which include, at least in part, a tamper-respondent sensor. The tamper-respondent sensor includes one or more formed flexible layers of, for instance, a dielectric material, having opposite first and second sides, and circuit lines defining at least one resistive network. The circuit lines are disposed on at least one of the first side or the second side of the formed flexible layer(s). The formed flexible layer(s) with the circuit lines includes curvatures, and the circuit lines overlie, at least in part, the curvatures of the formed flexible layer(s). In certain embodiments, the formed flexible layer(s) may be one or more corrugated layers or one or more flattened, folded layers.

A wiring board according to the present disclosure includes an insulation layer, and a wiring conductor positioned on the insulation layer. The wiring conductor includes a phosphorus-containing electroless copper-plating layer positioned on the insulation layer, a nickel-containing electroless copper-plating layer positioned on the phosphorus-containing electroless copper-plating layer, and an electrolytic copper-plating layer positioned on the nickel-containing electroless copper-plating layer.