Patent classifications
H05K2201/0376
INSULATED METAL SUBSTRATE AND METHOD FOR MANUFACTURING SAME
An insulated metal substrate (IMS) and a method for manufacturing the same are disclosed. The IMS includes an electrically conductive line pattern layer, an encapsulation layer, a first adhesive layer, a second adhesive layer, and a heat sink element. The encapsulation layer fills a gap between a plurality of electrically conductive lines of the electrically conductive line pattern layer. An upper surface of the encapsulation layer is flush with an upper surface of the electrically conductive line pattern layer. The first and second adhesive layer are disposed between the electrically conductive line pattern layer and the heat sink element. A bonding strength between the first adhesive layer and the second adhesive layer is greater than 80 kg/cm.sup.2.
Printed circuit board and method of fabricating the same
Disclosed is a printed circuit board. The printed circuit board includes an insulating layer, a copper foil formed on the insulating layer and formed therein with a groove to expose a portion of a top surface of the insulating layer, and a thermal conductive layer filled in the groove.
WIRING STRUCTURE AND METHOD OF MANUFACTURING THE SAME, SEMICONDUCTOR DEVICE, MULTILAYER WIRING STRUCTURE AND METHOD OF MANUFACTURING THE SAME, SEMICONDUCTOR ELEMENT MOUNTING SUBSTRATE, METHOD OF FORMING PATTERN STRUCTURE, IMPRINT MOLD AND METHOD OF MANUFACTURING THE SAME, IMPRINT MOLD SET, AND METHOD OF MANUFACTURING MULTILAYER WIRING BOARD
A mold includes a mold base material and a rugged structure located at a main surface of the mold base material. The rugged structure includes a plurality of linearly shaped projected portions for forming wiring, and a circularly shaped projected portion for forming a pad portion, in which a light-shielding layer is provided at a top portion flat surface of the circularly shaped projected portion for forming the pad portion.
Microelectronic assemblies having conductive structures with different thicknesses
Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a substrate layer having a surface, wherein the substrate layer includes a photo-imageable dielectric (PID) and an electroless catalyst; a first conductive trace having a first thickness on the surface of the substrate layer; and a second conductive trace having a second thickness on the surface of the substrate layer, wherein the first thickness is greater than the second thickness.
Antenna module
An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of the antenna. An uppermost wiring layer of the plurality of wiring layers is connected to the antenna through a connection via of an uppermost via layer of the plurality of via layers. The connection via penetrates at least a portion of the encapsulant.
INDUCTOR COMPONENT AND INDUCTOR COMPONENT MOUNTING SUBSTRATE
An inductor component includes a component body having a mounting surface and a top surface and provided therein with a spiral inductor wiring line advancing in the extending direction of a winding center axis. The inductor wiring line is connected to a first external electrode at a first end, and connected to a second external electrode at a second end. The component body includes: a first inclined surface connected to a first end of the mounting surface on a first side in a length direction and inclined toward the top surface as separating from the first end; and a second inclined surface connected to a second end of the mounting surface on a second side in the length direction and inclined toward the top surface as separating from the second end. The winding center axis extends in a direction parallel to the mounting surface and perpendicular to the length direction.
CIRCUIT STRUCTURE
A circuit structure includes a first busbar, a second busbar, an insulating member including an insulating portion located between the first busbar and the second busbar, a first wiring board provided on one main surface of the first busbar, one main surface of the second busbar and the insulating portion, and a first electronic component provided on the first wiring board. The first electronic component has a first connection terminal electrically connected to the first busbar and bonded to the first wiring board, and a second connection terminal electrically connected to the second busbar and bonded to the first wiring board.
CONDUCTIVE SUBSTRATE AND CARRIER PLATE WIRING STRUCTURE WITH FILTERING FUNCTION, AND MANUFACTURING METHOD OF SAME
A manufacturing method for a conductive substrate with a filtering function includes preparing a core layer and forming first and second conductive holes in the core layer, forming a sacrificial copper layer on the first conductive hole and on the core layer, forming a metal layer on the second conductive hole, forming a metal post in the first conductive hole, forming a lower insulating layer on the core layer, forming a lower insulative post in the second conductive hole, forming a magnet wrapping around the metal post to obtain a first conductive post, forming an upper insulating layer on the core layer, forming an upper insulative post in the second conductive hole to obtain a second conductive post, removing the upper insulating layer, the lower insulating layer, and the remaining sacrificial copper post layer, followed by flattening.
Method of fabricating contact pads for electronic substrates
Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.
Wiring structure and method of manufacturing the same, semiconductor device, multilayer wiring structure and method of manufacturing the same, semiconductor element mounting substrate, method of forming pattern structure, imprint mold and method of manufacturing the same, imprint mold set, and method of manufacturing multilayer wiring board
A mold includes a mold base material and a rugged structure located at a main surface of the mold base material. The rugged structure includes a plurality of linearly shaped projected portions for forming wiring, and a circularly shaped projected portion for forming a pad portion, in which a light-shielding layer is provided at a top portion flat surface of the circularly shaped projected portion for forming the pad portion.