A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer such that the solder resist layer has first opening exposing the first pad and second opening exposing the second pad with diameter smaller than diameter of the first opening, and bumps including a first bump on the first pad and a second bump on the second pad such that the second bump has diameter smaller than diameter of the first bump. The first bump has a base plating layer formed in the first opening and having raised portion, and a top plating layer formed on the base plating layer, and the second bump has a base plating layer formed in the second opening and having raised portion, and a top plating layer formed on the base plating layer.

A stretchable mounting board that includes a stretchable substrate having a main surface, a stretchable wiring disposed on the main surface of the stretchable substrate, a mounting electrode section electrically connected to the stretchable wiring, solder electrically connected to the mounting electrode section and including bismuth and tin, and an electronic component electrically connected to the mounting electrode section with the solder interposed therebetween. The mounting electrode section has a first electrode layer on a side thereof facing the stretchable wiring and which includes bismuth and tin, and a second electrode layer on a side thereof facing the solder and which includes bismuth and tin. A concentration of the bismuth in the first electrode layer is lower than a concentration of the bismuth in the second electrode layer.

Proposed is a conductive particle used for a testing socket electrically connecting a lead of a device to be tested and a pad of a test board by being arranged between the device to be tested and the test board, wherein the conductive particle has a predetermined depth d and has a length l that is greater than a width w, the conductive particle having a body part in a pillar shape, a first convex part having an upper surface, formed in a top of the body part, and a second convex part having a lower surface, formed in a bottom of the body part.

Described are various configurations of high-speed via structures. Various embodiments can reduce or entirely eliminate insertion loss in high-speed signal processing environments by using impedance compensation structures that decrease a mismatch in components of a circuit. An impedance compensation structure can include a metallic structure placed near a via to lower an impedance difference between the via and a conductive pathway connected to the via.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

A multi-layer circuit board is formed multiple layers of a catalytic layer, each catalytic layer having an exclusion depth below a surface, where the cataltic particles are of sufficient density to provide electroless deposition in channels formed in the surface. A first catalytic layer has channels formed which are plated with electroless copper. Each subsequent catalytic layer is bonded or laminated to an underlying catalytic layer, a channel is formed which extends through the catalytic layer to an underlying electroless copper trace, and electroless copper is deposited into the channel to electrically connect with the underlying electroless copper trace. In this manner, traces may be formed which have a thickness greater than the thickness of a single catalytic layer.

An electronic device and associated methods are disclosed. In one example, the electronic device can include an assembly having asymmetrically situated conductors. In selected examples, the assembly includes a ground plane, a central shield portion, a first side shield portion on a. first side, a second side shield portion on a second side, a first conductor asymmetrically situated between the central shield portion and the first side shield portion, a second conductor asymmetrically situated between the central shield portion and the second side shield portion, and dielectric within the assembly.

A module (101) includes a substrate (1) having a main surface (1a) and a conductor column (4) disposed on the main surface (1a). The conductor column (4) includes a conductor column body (4a) and an overhanging part (4b) overhanging from an outer periphery of the conductor column body (4a) in a middle of a height direction of the conductor column body (4a).

Described are various configurations of high-speed via structures. Various embodiments can reduce or entirely eliminate insertion loss in high-speed signal processing environments by using impedance compensation structures that decrease a mismatch in components of a circuit. An impedance compensation structure can include a metallic structure placed near a via to lower an impedance difference between the via and a conductive pathway connected to the via.

An insulated circuit board having a ceramic substrate, a circuit layer on which a circuit pattern is formed and that is bonded to one surface of the ceramic substrate, and a metal layer bonded to the other surface of the ceramic substrate. The circuit layer has a first circuit layer that is bonded to the ceramic substrate and is made of aluminum and a second circuit layer that is bonded to the upper surface of the first circuit layer and is made of copper, the metal layer has a first metal layer that is bonded to the ceramic substrate and is made of aluminum and a second metal layer that is bonded to the upper surface of the first metal layer and is made of copper, and the thicknesses of the first circuit layer and the first metal layer are each 0.2 mm or more and 0.9 mm or less.