Patent classifications
H05K2201/09345
AUTOMATIC DETERMINATION OF POWER PLANE SHAPE IN PRINTED CIRCUIT BOARD
A system and method to automatically determine power plane shape in a printed circuit board (PCB) involve obtaining inputs. The inputs include a size and shape of the PCB, a set of sources, and a set of sinks associated with a power plane. The method also includes determining a center of charge (CoC) as a center of largest current density for the set of sources and the set of sinks, and creating a sub-shape corresponding with a path from each source of the set of sources and from each sink of the set of sinks to the CoC. The creating the sub-shape includes determining a width of a conductor in the path corresponding with each of the sub-shapes. The sub-shapes created for the set of sources and the set of sinks are combined as the power plane shape.
METHOD OF PROVIDING POWER INPUT TO A FLEXIBLE PRINTED CIRCUIT AND A FLEXIBLE PRINTED CIRCUIT HAVING POWER INPUT IN ACCORDANCE WITH THE METHOD
A method of providing power input to a flexible printed circuit. The method involves the step of bisecting a flexible printed circuit into a first conductive area adapted for power input and a second conductive area adapted for ground connection. In accordance with this teaching, power input is provided to electrical components attached to the flexible printed circuit via first conductive area and second conductive area, rather than through individual control lines.
SIGNAL PROCESSING BOARD AND IMAGE FORMING APPARATUS
A signal processing board includes a six-layer substrate. A plurality of signal transmission planes are formed in a first layer, a third layer, a fourth layer, and a sixth layer. A first ground plane is formed in a second layer. A first power supply plane is formed in a fifth layer and electrically connected to the first semiconductor element. A second power supply plane is formed in the fifth layer and electrically connected to the second semiconductor element. A second ground plane is formed in the fifth layer. A first bypass capacitor is electrically connected to the first power supply plane and the second ground plane. A second bypass capacitor is electrically connected to the second power supply plane and the second ground plane.
ELECTRONIC CONTROL DEVICE AND GROUND LINE ROUTING METHOD
An electronic control device includes a plurality of circuit boards that transmit signals to each other and a power supply connector for direct-current power. A ground line connected to a ground terminal of the power supply connector is connected to a ground of one of the plurality of circuit boards by way of a ground of another one of the plurality of circuit boards. In this way, the electronic control device including the plurality of circuit boards needs fewer noise reduction components while enabling easier routing of ground lines.
Wiring board
A wiring board of the present disclosure includes: an insulating base having a first surface including a mounting region and a second surface connected to an external board; a power supply conductor including a first planar conductor, and first linear conductors; a grounding conductor including a second planar conductor, and second linear conductors; power supply terminals, being electrically connected to the first planar conductor; and grounding terminals being electrically connected to the second planar conductor.
Routing-over-void-T-line-compensation
Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion.
Monolithic Pstages and methods for voltage regulators
Monolithic power stage (Pstage) packages and methods for using same are provided that may be implemented to provide lower thermal resistance/enhanced thermal performance, reduced noise, and/or smaller package footprint than conventional monolithic Pstage packages. The conductive pads of the disclosed Pstage packages may be provided with a larger surface area for contacting respective conductive layers of a mated PCB to provide a more effective and increased heat transfer away from a monolithic Pstage package. In one example, the increased heat transfer away from the monolithic Pstage package results in lower monolithic Pstage package operating temperature and increased power output. In another example, a monolithic Pstage package may be provided with an adaptive application-oriented interface and a multi-function pin that allows the same monolithic Pstage package to automatically detect and select between a relatively higher power information handling system application, and a relatively lower power information handling system VR application.
Printed circuit board and card reader
Provided is a printed circuit board having a breakdown detection pattern formed thereon for preventing illicit acquisition of sensitive data, the printed circuit board being configured so that false detection of a disconnection or a short in the breakdown detection pattern can be prevented. The printed circuit board comprises a breakdown detection pattern layer wherein a breakdown detection pattern is formed for detecting a disconnection and/or a shorting thereof, a first pattern layer disposed more to a Y1 direction side than the breakdown detection pattern layer, a second pattern layer disposed more to a Y2 direction side than the breakdown detection pattern layer, and signal pattern layers disposed more to the Y2 direction side than the second pattern layer. Formed in the first pattern layer are a grounding pattern and a power source pattern covering the breakdown detection pattern from the Y1 direction side. Formed in the second pattern layer are a grounding pattern and a power source pattern covering the breakdown detection pattern from the Y2 direction side.
Semiconductor device
A semiconductor device includes: an annular or partially annular substrate; a first control circuit provided on the substrate and configured to control a first phase of a motor; a second control circuit provided on the substrate so as to be adjacent to the first control circuit in a circumferential direction of the substrate and configured to control a second phase of the motor; a power supply wiring disposed on one of outer and inner circumferential sides of the first and second control circuits in a radial direction of the substrate, the power supply wiring being connected to the first and second control circuits, and extending in the circumferential direction; and a ground winding disposed on another one of the outer and inner circumferential sides of the first and second control circuits in the radial direction, being connected to the first and second control circuits, and extending in the circumferential direction.
ROUTING-OVER-VOID T-LINE COMPENSATION
Apparatus and methods are provided for ameliorating distortion issues associated with a conductor that passes over a void in a reference plane. In an example, the signal conductor can include a first part routed over the major surface of a first side of the reference plane structure on a first side of the void and that approaches a first edge of the reference plane structure with a first trajectory, a second part routed over the major surface of the reference plane structure on a second side of the void and that approaches a second edge of the reference plane structure with a second trajectory, and a third portion connecting the first portion with the second portion, the third portion spanning the void, and having a plurality of spurs extending from a body of the third portion.