Patent classifications
H05K2201/09463
CIRCUIT SUBSTRATE
A circuit substrate includes a dielectric layer, a first conductive structure and a second conductive structure. The first conductive structure includes a first conductive circuit and a first conductive via. The first conductive circuit is disposed on the dielectric layer. The first conductive via is disposed in the dielectric layer, and the first conductive circuit is connected to the first conductive via. The second conductive structure includes a second conductive circuit and a second conductive via. The second conductive circuit is disposed in the dielectric layer, the second conductive circuit and the first conductive circuit of the first conductive structure are arranged with an interval, and the second conductive via surrounds the first conductive via with an interval. The second conductive structure has an extending portion. The extending portion protrudes toward the first conductive via and does not contact the first conductive via.
Printed circuit board and electric device
A printed circuit board includes a power feeding layer to which a power supply voltage is applied, a plurality of power feeding terminals that is disposed in an area, in which an electronic component is mounted, and supplies current based on the power supply voltage to the electronic component, and a plurality of vias that electrically interconnects the plurality of power feeding terminals and the power feeding layer, and is formed such that a via coupled to a power feeding terminal disposed closer to an end of the area has a smaller via-diameter.
Zero-misalignment via-pad structures
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
POWER SIGNAL TRANSMISSION STRUCTURE AND DESIGN METHOD THEREOF
A power signal transmission structure and a design method are provided. The power supply signal transmission structure is adapted for a circuit board having a first surface and a second surface opposite to the first surface, and the power signal transmission structure includes a first power electrode, a second power electrode, and a plurality of vias. The first power electrode is disposed on the first surface and has a plurality of power pad regions for receiving a power signal. The second power electrode is disposed on the second surface. The vias penetrate the circuit board to electrically connect the first power electrode and the second power electrode. The vias are arranged in accordance with the current direction of the power signal to balance the current received by the vias.
PRINTED CIRCUIT BOARD AND ELECTRIC DEVICE
A printed circuit board includes a power feeding layer to which a power supply voltage is applied, a plurality of power feeding terminals that is disposed in an area, in which an electronic component is mounted, and supplies current based on the power supply voltage to the electronic component, and a plurality of vias that electrically interconnects the plurality of power feeding terminals and the power feeding layer, and is formed such that a via coupled to a power feeding terminal disposed closer to an end of the area has a smaller via-diameter.
ZERO-MISALIGNMENT VIA-PAD STRUCTURES
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
Zero-misalignment via-pad structures
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
Electronic device
An electronic device including a first conductive element, a second conductive element, a substrate, and a conductor is provided. The first conductive element has a first region. The substrate has a through hole. The first through hole is disposed between the first conductive element and the second conductive element. The conductor electrically connects the first conductive element to the second conductive element through the through hole. The through hole is partially surrounded by the first region.
ELECTRONIC DEVICE
An electronic device includes a first semiconductor, a circuit structure and a substrate. The circuit structure has a first conductive layer, a second conductive layer and a first insulating layer between the first conductive layer and the second conductive layer. The first conductive layer has a first conductive pattern. The second conductive layer has a plurality of second conductive patterns. The first conductive pattern is closer to the first semiconductor than the plurality of second conductive patterns. The substrate is disposed between the first semiconductor and the circuit structure. The substrate has a through hole penetrating the substrate and the first semiconductor is electrically connected to the circuit structure through the through hole. In a cross-sectional view of the electronic device, a maximum width of the first conductive pattern is less than a maximum width of one of the plurality of second conductive patterns.
PRINTED WIRING BOARD WITH PLURALITY OF SOLDERING PADS ARRANGED THEREON, AND PAD
A printed wiring board includes a plurality of pads aligned along a circular circumference, and a plurality of through holes formed in the respective pads so as to overlap therewith. The pads each extend along the radial direction of the circular circumference, and have a shape that becomes wider in a direction away from a center of the circular circumference. The through holes are each located close to one side edge of the corresponding pad extending along the radial direction of the circular circumference, and spaced from the other side edge, and the one side edge is partially cut away by the through hole. The through hole partially cutting away the one side of the pad, and the other side edge of another pad adjacent to the pad are opposed to each other with a clearance therebetween.