An apparatus comprises a printed circuit board (PCB) having a first surface and a second surface, a plurality of blind press-fit vias penetrating the first surface and extending partially through the PCB toward the second surface, the blind press-fit vias configured to receive press-fit connectors of at least one component to be connected to the PCB, and a plurality of electrical connectors disposed in a region of the second surface opposite the blind press-fit vias and configured to interface with one or more signal processing components disposed on the second surface.

Provided is a copper foil provided with a carrier in which the laser hole-opening properties of the ultrathin copper layer are good and which is suitable for producing a high-density integrated circuit substrate. A copper foil provided with a carrier having, in order, a carrier, an intermediate layer, and an ultrathin copper layer, wherein the specular gloss at 60° in an MD direction of the intermediate layer side surface of the ultrathin copper layer is 140 or less.

A wiring circuit board includes an insulating layer having a via penetrating in a thickness direction, a first conductive layer disposed on a one-side surface in the thickness direction of the insulating layer, a second conductive layer disposed on the other-side surface in the thickness direction of the insulating layer, and a conductive portion disposed on an inner peripheral surface of the via and electrically connecting the first and second conductive layers. Length L of 1 .Math.m-10 .Math.m inclusive, is measured by: drawing a segment joining first and second connection points from respectively, the one-side surface to the other-side surface in the thickness direction of the insulating layer and the inner peripheral surface in the cross-sectional view; identifying an outermost position farthest outward from the segment on the inner peripheral surface in the cross-sectional view; and measuring the length as the shortest distance from the segment to the outermost position.

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.

A printed circuit board (PCB) includes: a substrate; and a circuit pattern disposed on the substrate, wherein the circuit pattern includes a first seed layer disposed on the substrate and including a nitride, and a metal layer disposed on the first seed layer.

A semiconductor chip module includes a PCB including first and second faces; a buffer on the first face; a first chip on the first face, and including a first connection terminal and a second connection terminal, a first signal being provided to the first connection terminal, and a second signal being provided to the second connection terminal; a second chip on the second face, and including a third connection terminal to which the first signal is provided, and a fourth connection terminal to which the second signal is provided. The first connection terminal and the third connection terminal receive the first signal from the buffer at the same time. The first connection terminal be is closer to the buffer as compared with the second connection terminal. The third connection terminal is closer to the buffer as compared with the fourth connection terminal.

A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.

A flexible circuit board includes two first wiring boards, a first adhesive, and a first conductive structure. Each of the two first wiring boards includes a first bent portion, and two first bent portions of the two wiring boards is connected to each other. The first adhesive layer is sandwiched between the two first bent portions. The first conductive structure penetrates the two first bent portions and the first adhesive layer and electrically connects the two first bent portions.

A component carrier is illustrated and described. The component carrier has i) a stack with at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, and ii) at least one elastic element attached to the stack and configured to reversibly connect the component carrier with a further component carrier by elastically deforming the at least one elastic element and essentially not deforming the stack and the further component carrier.

A resin multilayer substrate includes a multilayer body including resin layers and adhesive layers that are laminated, via conductors in the resin layers, and bonding portions in the adhesive layers. The bonding portion is connected to the via conductor. One of the resin layer and the adhesive layer is a gas high-permeable layer having a higher gas permeability than the other one. The bonding portion includes an organic substance, or has a higher void content rate per unit plane sectional area than the via conductor. At least a portion of each of the bonding portions contacts the gas high-permeable layers.