A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.

A method of making leak tight electrical connections through the wall of a ceramic package, for example a ceramic package used on an image intensifier tube. The method comprises a hole metallisation step (500) to obtain vias, the metallisation step comprising the deposition of a bond layer (510), a diffusion barrier (520) acting as a metallic base layer and a wetting agent (530). For each via, a filler metal preform made of indium or a eutectic chosen from among InSn, AuSn, AuGe, AgSn is deposited (540) on each orifice and is heated to a temperature higher than its melting temperature (550) such that the molten filler metal closes off the via to make it leak tight.

An appliance includes a user interface assembly. The user interface assembly includes a plurality of indicator lights mounted on a printed circuit board. An opaque material is disposed within the printed circuit board between adjacent indicator lights of the plurality of indicator lights. The adjacent indicator lights are optically separated by the opaque material.

In a printed circuit board (1), thermal vias (19) are formed between the lower surface (A) and an upper surface (B) of the substrate plate (10) of the printed circuit board through the steps of: applying a respective solder resist mask (21, 31) to the lower surface (A) and the upper surface (B); applying solder to the lower surface (A) and reflow soldering the solder, wherein the solder penetrates into the boreholes (20) and forms convex menisci (26) protruding beyond the edge (22) of the respective boreholes on the lower surface (A); and creating regions (35) on the upper surface (B), which are freed from solder resist material, and which are intended for contacting at least one electronic component (17) on the upper surface and each of which comprise at least one of the thermal vias. Subsequently, the upper surface (B) can be provided with electrical components (17) on these regions (35). The first solder resist mask (21) has a respective region (23) that is free of solder resist on the lower surface around the edge of every borehole (20).

Filing a plated through-hole of a circuit board with solder is facilitated by an apparatus which includes a wire solder assembly and a controller. The wire solder assembly includes a wire probe sized to extend into the plated through-hole from one side of the circuit board, and a solder block associated with the wire probe so that the probe passes through the solder block. The controller controls heating of the wire probe, when the wire probe is operatively inserted into the plated through-hole, by passing a current through the wire probe. The heating of the wire probe heats a conductive plating of the plated through-hole and melts the solder block. The heating of the conductive plating and the melting of the solder block causes the solder to migrate into the plated through-hole by capillary action to fill the plated through-hole with the solder.

The present disclosure relates to systems and methods using thermal vias to increase the current-carrying capacity of conductive traces on a multilayered printed circuit board (PCB). In various embodiments, parameters associated with vias may be selected to control various electrical and thermal properties of the conductive trace. Such parameters include the via diameter, a plating thickness, a number of vias, a placement of the vias, an amount of conductive material to be added or removed from the conductive trace, a change in the resistance of the conductive trace, a change in a fusing measurement of the conductive trace, and the like.

A method of manufacturing a circuit substrate including forming, in an insulating substrate and circuit patterns that are provided on a first surface and a second surface of the insulating substrate, a through-hole penetrating the insulating substrate and the circuit patterns, where the circuit patterns contain Cu as a main component. The method including filling, in the through-hole, an electrically conductive paste that is a melting-point shift electrically conductive paste including SnBi solder powder, Cu powder, and resin, and forming a protrusion obtained by causing the electrically conductive paste to protrude from the through-hole. The method further including performing pressure treatment on the protrusion near the through-hole; and performing heat treatment on the insulating substrate whose protrusion is subjected to the pressure treatment and causing the circuit patterns and the electrically conductive paste to be electrically connected with each other.

The present disclosure relates to systems and methods using thermal vias to increase the current-carrying capacity of conductive traces on a multilayered printed circuit board (PCB). In various embodiments, parameters associated with vias may be selected to control various electrical and thermal properties of the conductive trace. Such parameters include the via diameter, a plating thickness, a number of vias, a placement of the vias, an amount of conductive material to be added or removed from the conductive trace, a change in the resistance of the conductive trace, a change in a fusing measurement of the conductive trace, and the like.

Implementations of the disclosure describe techniques for eliminating or reducing hot tearing in via-in-pad plated over (VIPPO) solder joints by incorporating an adhesive into a printed circuit board assembly (PCBA). In an embodiment, the adhesive is an adhesive containing fluxing agent that prevents tearing by reducing a differential in thermal expansion caused by a coefficient of thermal expansion (CTE) mismatch between a plated metal of the VIPPO pads and the PCB substrate.

The present disclosure relates to a structure and a method for filling a via hole formed in a multilayer printed circuit board, and more particularly, to a structure and a method for filling a via hole formed in a multilayer printed circuit board, the structure and method enabling high-current transmission even in a narrow space in such a way that a via hole formed when a typical multilayer printed circuit board is manufactured is first filled with Cu and Ag plating, and the remaining vacant space is completely filled with a solder cream, thereby increasing the amount of conductors.