A multi-layer ceramic electronic component includes a ceramic body and an external electrode. The ceramic body includes a first main surface and a second main surface that face in a first direction, internal electrodes laminated in the first direction, and a penetrating hole that has a diameter decreasing from the first main surface toward the second main surface and includes a tapered surface, the internal electrodes being exposed on the tapered surface. The external electrode includes a first conductive layer disposed along the tapered surface, and a second conductive layer disposed along the first main surface and connected to the first conductive layer.

A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.

The present invention relates generally to electric circuit testing, building, or implementing using a breadboard-style printed circuit board (PCB). Aspects of the present invention include eliminating the need to use hookup wires when building and testing electric circuits on PCBs. In one or more embodiments, a PCB system having rows and columns of signal tie points connected in a breadboard layout and using an embedded wire and a solder bridge to form partial connections between signal tie points may be built. In one or more embodiments, an embedded wire and solder bridge is capable of connecting a column of signal tie points, and/or an embedded wire and solder bridge is capable of connecting a power rail to a signal tie point. Thus, a circuit may be implemented and tested by applying a small amount of solder to the solder bridge without the need for hookup wire.

The present invention relates generally to electric circuit testing, building, or implementing using a breadboard style PCB. Aspects of the present invention include eliminating the need to use hookup wires when building and testing electric circuits on PCBs. In embodiments, a PCB system having rows and columns of signal tie points connected in a breadboard layout and using an embedded wire and a solder bridge to form partial connections between signal tie points. In embodiments, the embedded wire and solder bridge is capable of connecting a column of signal tie points. In embodiments, the embedded wire and solder bridge is capable of connecting a power rail to a signal tie point. Thus, a circuit can be implemented and tested by applying a small amount of solder to the solder bridge without the need for hookup wires.

A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.

A printed circuit board (1) comprising an insulating layer (2) and a conducting layer (3) arranged on the insulating layer (2) and structured into a contact surface (4) for an electronic component (11) which is to be populated on the printed circuit board (1) has, in the area of the contact surface (4), at least one channel (8) that passes through the contact surface (4) and the insulating layer (2) and that is filled with a thermally conductive material. The process is characterized by the steps of preparing an insulating layer (2) and a conducting layer (3) connected with the insulating layer (2); producing at least one channel (8) passing through the conducting layer (2) and the insulating layer (3); lining the channel (8) with thermally conductive material; structuring the conducting layer (3) into a contact surface (4) for an electronic component (11) to be populated on the printed circuit board; preparing a solder deposit (9) at least minimally overlapping with the contact surface (4); setting down the electronic component (11); melting the solder, and cooling.

A substrate on which an electronic component is soldered, includes an electronic component, a through hole positioned on the substrate and passing through the substrate, a solder that joins the through hole and a terminal of the electronic component inserted in the through hole, a pattern formed on a first surface of the substrate, the first surface facing a second surface on which the electronic component is placed, a first resist superimposed on the pattern, an exposed portion of which the pattern is exposed from the first resist around the through hole, and a second resist superimposed on the pattern and arranged between the through hole and the exposed portion.

Electronic assembly methods and structures are described. In an embodiment, an electronic assembly method includes bringing together an electronic component and a routing substrate, and directing a large area photonic soldering light pulse toward the electronic component to bond the electronic component to the routing substrate.

A circuit board (1) for a power semiconductor module (13), having at least one top side (2) and one bottom side (3), wherein at least one mounting area (4) for a power semiconductor component (12) is provided on the top side (2), wherein on the mounting area (4), at least one solder layer (8) is provided for connecting at least one power semiconductor component (12) to the mounting area (4), which layer is divided into regions (9) that are separated from one another by means of intermediate spaces (11), and wherein multiple thermal vias (5) are provided in the circuit board (1) and extend from the top side (2) to the bottom side (3) of the circuit board (2) in the region of the mounting area (4), wherein each upper opening (6) of the thermal vias (5) is directly surrounded by a respective region (9) of the solder layer (8) and each lower opening (7) of the vias (5) is covered by a layer (10) of electrically insulating material.

A multi-layer circuit board is formed by positioning a top sub having traces on at least one side to one or more pairs of composite layers, each composite layer comprising an interposer layer and a sub layer. Each sub layer which is adjacent to an interposer layer having an interconnection aperture, the interconnection aperture positioned adjacent to interconnections having a plated through via or pad on each corresponding sub layer. Each interposer aperture is filled with a conductive paste, and the stack of top sub and one or more pairs of composite layers are placed into a lamination press, the enclosure evacuated, and an elevated temperature and laminated pressure is applied until the conductive paste has melted, connecting the adjacent interconnections, and the boards are laminated together into completed laminated multi-layer circuit board.