A component carrier includes a layer stack with at least one electrically insulating layer structure and/or at least one electrically conductive layer structure, at least one opening in the layer stack, a first curable dielectric element arranged at least partially on the opening, and a second curable dielectric element arranged adjacent to the first curable dielectric element, so that there is an interface region in between. A part of the first curable dielectric element extends partially into the opening.

A component carrier having a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure; an opening located at least partially in the stack; and a fill material which is located within the opening. The fill material is a photosensitive material, wherein at least a part of the photosensitive material has undergone a hardening treatment with electromagnetic radiation. A method for manufacturing such a component carrier is further described.

A circuit board structure includes a substrate, a third dielectric layer, a fourth dielectric layer, a first external circuit layer, a second external circuit layer, a conductive through hole electrically connected to the first and second external circuit layers, a first annular retaining wall surrounding the conductive through hole, and a second annular retaining wall surrounding the conductive through hole. The first annular retaining wall is electrically connected to the first external circuit layer and a first inner circuit layer. The second annular retaining wall is electrically connected to the second external circuit layer and a second inner circuit layer. A first ground circuit, the first annular retaining wall, and the first inner circuit layer define a first ground path surrounding a first signal circuit. A second ground circuit, the second annular retaining wall, and the second inner circuit layer define a second ground path surrounding a second signal circuit.

Embodiments include package substrates and method of forming the package substrates. A package substrate includes a first encapsulation layer over a substrate, and a second encapsulation layer below the substrate. The package substrate also includes a first interconnect and a second interconnect vertically in the first encapsulation layer, the second encapsulation layer, and the substrate. The first interconnect includes a first plated-through-hole (PTH) core, a first via, and a second via, and the second interconnect includes a second PTH core, a third via, and a fourth via. The package substrate further includes a magnetic portion that vertically surrounds the first interconnect. The first PTH core has a top surface directly coupled to the first via, and a bottom surface directly coupled to the second via. The second PTH core has a top surface directly coupled to the third via, and a bottom surface directly coupled to the fourth via.

The invention relates to a method for soldering an SMD component (1) to a circuit carrier (2) in a positionally stable manner, having the following steps: a) providing a circuit carrier (2) comprising at least one printed circuit board contact surface (2a), which is coated with a soldering paste (3) and which is designed to electrically, thermally and/or mechanically contact the SMD component (1) to be connected, wherein a number of filled vias (6), which cannot be coated with molten solder, pass through the circuit carrier (2) at least in the region of the printed circuit board contact surface (2a), b) applying at least one adhesive point (4a, 4b, 4c, 4d, 4e) onto the circuit carrier (2) such that the adhesive point (4a, 4b, 4c, 4d, 4e) delimits the printed circuit board contact surface (2a) coated with soldering paste (3) on at least one side of an edge point (R.sub.a, R.sub.b) paired with the soldering paste (3), c) placing an SMD component (1), which comprises at least one component contact surface (1a), on the printed circuit board contact surface (2a) coated with soldering paste (3) such that the at least one component contact surface (1a) electrically, thermally and/or mechanically contacts the printed circuit board contact surface (2a) via the soldering paste (3) lying therebetween, said placement being carried out and the position of said at least one adhesive point (4a, 4b, 4c, 4d, 4e) being selected in step b) such that the SMD component (1) rests on the soldering paste (3) without contacting the at least one adhesive point (4a, 4b, 4c, 4d, 4e), d) waiting for a specifiable duration t until a curing process of the at least one adhesive point (4a, 4b, 4c, 4d, 4e) is complete, and e) heating, melting and subsequently cooling the soldering paste (3) in order to produce an electric, thermal and/or a mechanical connection between the at least one component contact surface (1a) of the SMD component (1) and the at least one printed circuit board contact surface (2a) of the circuit carrier (2), wherein a barrier (5) is formed using the at least one adhesiv

A wiring board includes an insulating base including a first principal surface, a second principal surface opposite to the first principal surface, and a first through hole penetrating the insulating base from the first principal surface to the second principal surface, a functional material provided inside the first through hole, a first insulating layer covering the first principal surface, and a first surface of the functional material, and a second insulating layer covering the second principal surface, and a second surface of functional material. A second through hole is formed in the first insulating layer, the functional material, and the second insulating layer, and a conductive layer is formed on a wall surface of the second through hole.

A wiring board includes a core layer having a first through hole formed therein, a magnetic resin filled inside the first through hole, a second through hole formed in the magnetic resin, and a plating film covering an inner wall surface of the second through hole. The plating film includes an electroless plating film, and an electrolytic plating film. The electroless plating film makes direct contact with an inner wall surface of the second through hole.

A circuit board includes a substrate, a first magnetic structure, a first dielectric layer and an inductive coil. The substrate has a top surface and a bottom surface. The first magnetic structure is disposed on the top surface of the substrate. The first dielectric layer covers the substrate and the first magnetic structure. The inductive coil includes a first interconnect, a second interconnect and a plurality of conductive pillars. The first interconnect is disposed on the first dielectric layer. The second interconnect is disposed on the bottom surface of the substrate. The conductive pillars connect the first interconnect and the second interconnect. The first interconnect, the second interconnect and the conductive pillars form a helical structure surrounding the first magnetic structure.

An interconnect structure includes a first conductor, a second conductor, a dielectric block, a substrate, and a pair of conductive lines. The first conductor and the second conductor form a differential pair design. The dielectric block surrounds the first conductor and the second conductor. The first conductor is separated from the second conductor by the dielectric block. The substrate surrounds the dielectric block and is spaced apart from the first conductor and the second conductor. The pair of conductive lines is connected to the first conductor and the second conductor, respectively, and extends along a top surface of the dielectric block and a top surface of the substrate.

A wiring substrate includes: a base material; a first through-hole and a second through-hole that are formed in the base material; magnetic material that is filled in the first through-hole; a third through-hole that is formed in the magnetic material; a first plating film that covers an inner wall surface of the third through-hole; and a second plating film that covers an inner wall surface of the second through-hole and the first plating film. The first plating film includes a first electroless plating film that is in contact with the inner wall surface of the third through-hole, and a first electrolytic plating film that is laminated on the first electroless plating film.