Embodiments described herein may be related to apparatuses, processes, and techniques directed to embedding capacitors in through glass vias within a glass core of a substrate. In embodiments, the through glass vias may extend entirely from a first side of the glass core to a second side of the glass core opposite the first side. Layers of electrically conductive material and dielectric material may then be deposited within the through glass via to form a capacitor. the capacitor may then be electrically coupled with electrical routings on buildup layers on either side of the glass core. Other embodiments may be described and/or claimed.

A resin multilayer substrate includes a multilayer body including resin base-material layers in a thickness direction, a side-surface conductor on at least a side surface of the multilayer body and made of a metallic material with a coefficient of thermal expansion whose difference from a coefficient of thermal expansion of the resin base-material layers in a plane direction is smaller than a difference from a coefficient of thermal expansion of the resin base-material layers in the thickness direction, a circuit component in the multilayer body and defining a circuit, and inner conductors in the multilayer body, located between the side-surface conductor and the circuit component along the side-surface conductor, and at least partially overlapping each other when viewed in the thickness direction, each of the inner conductors being one of a dummy conductor and a ground conductor.

A multiple output isolated power supply for the usage as a floating V/I source in an automated test equipment. The multiple output isolated power supply includes a multi-layer printed circuit board. Furthermore the multiple output isolated power supply includes a planar transformer, which includes a plurality of secondary windings associated with different output channels, arranged on or in the multi-layer PCB. At least two output channels out of the output channels of the multiple output isolated power supply includes a rectifier and a voltage regulator or a current regulator.

An LTCC integrated circuit mold unit includes an integrated mold formed by multiple circuit mold units which are superposed, electrodes sheathed in the integrated mold and conductive wire sections sheathed in the integrated mold. Each circuit mold unit is formed by a ceramic base with an electrode pattern recess and a through hole. A denting depth of the electrode pattern recess is between 0.5 μm and 5000 μm. The through hole penetrates through the ceramic base. An inner diameter of the through hole is above 10 μm. The electrode pattern recess is filled with a conductive material to form one of the electrodes. Each through hole is filled with the conductive material to form one of the conductive wire sections. The conductive wire sections which are vertically adjacent are connected to form a conductive path. The conductive path electrically connects to at least one of the electrodes.

A multi-layer printed circuit board having a first landing pad in a first layer and along a first axis arranged to receive a positive signal and a second landing pad in the first layer and along a second axis that is spaced away from the first axis longitudinally in the first layer and where the second landing pad arranged to receive a negative signal. A first buried in a second layer and along the first axis is spaced away from the first landing pad along the first axis. A second buried in the second layer and along the second axis is spaced away from the second landing pad along the second axis. A first signal connector provides a first electrical connection between the first landing pad and the second buried via and a second signal connector provides a second electrical connection between the second landing pad and the first buried via.

A printed circuit board includes a first board including a plurality of first insulating layers and a plurality of first wiring layers disposed between the plurality of first insulating layers, respectively; and a second board disposed on one surface of the first board and including a plurality of second insulating layers and a plurality of second wiring layers disposed on or between the plurality of second insulating layers, respectively. At least one of the plurality of first insulating layers has a thickness less than a thickness of at least one of the plurality of second insulating layers. The first board further includes a through-via penetrating each of the plurality of first insulating layers and connected to one of the plurality of second wiring layers.

Disclosure provides an adapter board and a method for making the adapter board, which includes providing a mold in which a plurality of first fixing plates and second fixing plates are provided, providing a plurality of wires sequentially passed through the plurality of first fixing plates and the second fixing plate, injecting a non-conductive material into the cavity to form a body, and cutting the body along both sides of the first fixing plates and the second fixing plates to obtain a plurality of board bodies. The first fixing plates are provided with a plurality of first fixing holes, and the second fixing plates are provided with a plurality of second fixing holes. The board body includes a first surface and a second surface. A plurality of first connection pads are formed on the first surface, and a plurality of second connection pads are formed on the second surface.

Micro-scale planar-coil transformers including one or more shields are disclosed. The one or more shields can block most common-mode current from crossing from one side to another side of a transformer. Reduction of common-mode current crossing the transformer results in reduction of dipole radiation, which is the main component of electromagnetic interference (EMI) in some transformers.

A printed circuit board includes a first electrically conductive reference plane configured to distribute a first reference voltage applied thereto across a surface area of the first reference plane, and a second electrically conductive reference plane extending parallel to the first reference plane, and configured to distribute a second reference voltage applied thereto across a surface area of the second reference plane. A first layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more first signal lines extending adjacent the first reference plane. The first layer is divided into: (i) a first region in which the one or more first signal lines are disposed, (ii) a second region containing an additional plane that is configured to receive a third voltage and has smaller surface area relative to the surface areas of the first and second reference planes, and (iii) a third region containing a dielectric layer. A second layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more second signal lines extending adjacent the second reference plane. The second signal lines have linewidths that vary as a function of whether they are vertically aligned with the first region, the second region, or the third region.

A display device includes: a panel including a display region and a touch region; and a circuit board, and including a first conductive layer, a second conductive layer and a first insulating layer between the first conductive layer and the second conductive layer. The circuit board includes: a plurality of data lines electrically connected with a plurality of data signal lines; a plurality of touch lines electrically connected with a plurality of touch electrodes; and a first ground line disposed between at least two or more of the plurality of data lines and the plurality of touch lines. The first ground line includes a first part of the first conductive layer, a first part of the second conductive layer, and a first via passing through the first insulating layer and connecting the first part of the first conductive layer with the first part of the second conductive layer.