A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.

A method for manufacturing a flexible printed circuit board, comprising: providing a flexible printed circuit substrate; defining first through holes and second through holes through the flexible printed circuit substrate; and forming first conductive pillars and second conductive pillars; and defining first grooves by removing a portion of each first conductive pillar and defining second grooves by removing a portion of each second conductive pillar; the first grooves and the second grooves are defined from an outer surface of the flexible printed circuit board on the second conductive pattern layer side to a surface of the second conductive pattern layer away from the first conductive pattern layer; each of the first grooves is aligned with and corresponds to one first conductive pillar, and each of the second grooves is aligned with and corresponds to one second conductive pillar.

A method is provided for forming a printed circuit board (PCB) assembly. The method may include drilling a first plurality of vias having a first diameter in a PCB and filling the first plurality of vias to form a first plurality of plated or filled vias. The method may also include drilling a second plurality of vias having a second diameter in the PCB, and filling the second plurality of vias to form a second plurality of plated or filled vias. The first plurality of plated or filled vias is mixed with the second plurality of plated or filled vias such that the spacing between the first plurality of plated or filled vias and the second plurality of plated or filled vias is less than the first diameter and the second diameter.

A glass wiring board is provided with an analog duplexer including an inductor and a capacitor, and includes: a core wiring board provided with the coil-shaped inductor having through electrodes and wiring patterns provided in a glass substrate via an inorganic adhesive layer, and with a land pattern connected to an outer layer; the capacitor having a structure with a dielectric layer sandwiched between upper and lower electrode patterns on an insulating resin layer covering the core wiring board; and a wiring pattern for connecting to an external component such as an external substrate.

A light emitting device filament includes a substrate having a first surface and a second surface opposite to the first surface and extending in one direction, at least one light emitting device chip disposed on the first surface, and an auxiliary pattern disposed on the second surface and disposed at a position corresponding to the light emitting device chip.

A control device and a circuit board are provided. The control device can cooperate with the circuit board, and includes a ball grid array. The ball grid array includes a plurality of power balls and a plurality of ground balls, which are jointly arranged in a ball region. The power balls and the ground balls are respectively divided into a plurality of power ball groups and a plurality of ground ball groups. One of the ground ball groups includes two ground balls and is adjacent to a power ball group. A ball pitch between the two ground balls is greater than that between one of the power balls and one of the ground balls adjacent to each other. The circuit board includes a contact pad array corresponding to the ball grid array of the control device so that the control device can be disposed on the circuit board.

The terminal connection structure includes a first terminal group 80 including a plurality of first terminals 81 aligned side-by-side, and a second terminal group 110 including a plurality of second terminals 112 aligned side-by-side and connected to the plurality of first terminals 81, the second terminal group 110 opposing to the first terminal group 80 and electrically connected to the first terminal group 80 via an anisotropic conductive film, wherein each of the first terminals 81 has a recess-projection shape and each of the second terminals 112 has a recess-projection shape, two adjacent first terminals 81A, 81B have different and corresponding shapes with each other, and two adjacent second terminals 112A, 112B have different and corresponding shapes with each other.

A multilayer substrate includes a multilayer body including a plurality of stacked resin layers and a wiring layer provided in the resin layer. The multilayer body includes a deformable flexible portion which generally defines a wave-shaped portion extending in a direction of travel that is repeatedly changed when viewed in a direction of stacking of the resin layers, the wiring layer being routed along the wave-shaped portion. The flexible portion includes a turn-back portion arranged at a position where the direction of travel is changed and an intermediate portion connecting adjacent turn-back portions to each other. A width of the turn-back portion is greater than a width of the intermediate portion.

A wiring substrate includes an insulating substrate that is square in plan view, the insulating substrate having one main surface with a recess and an other main surface opposite to the one main surface, and external electrodes located on the other main surface of the insulating substrate and in a peripheral section of the insulating substrate. The external electrodes include first external electrodes and second external electrodes. In plan view, the first external electrodes are located at corners of the insulating substrate, and the second external electrodes are interposed between the first external electrodes. Each of the first external electrodes has a smaller area and a larger width in a direction orthogonal to each side of the insulating substrate than each of the second external electrodes.

Methods and structures are provided for implementing embedded wire repair for printed circuit board (PCB) constructs. A repair wire layer is provided within the PCB stack with reference planes on opposite sides of the repair wire layer. When a repair connection is required, an appropriate plated through hole (PTH) is drilled to form the repair connection using the repair wire layer.