An apparatus and method for providing an artificial standoff to the bottom of leads on a QFN device sufficient to provide a gap that changes the fluid dynamics of solder flow and create a unique capillary effect that drives solder up the of leads of a QFN device when it is attached to a printed wiring board (PWB).

Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate includes a first pair and a second pair of electrical contacts on a first surface of the substrate. The first pair of electrical contacts can be configured to receive a first surface-mount capacitor, and the second pair of electrical contacts can be configured to receive a second surface-mount capacitor. The first pair of electrical contacts can be spaced apart by a first space, and the second pair of electrical contacts can be spaced apart by a second space. The first and second spaces can correspond to corresponding to first and second distances between electrical contacts of the first and second surface-mount capacitors.

A substrate is manufactured by drilling a chip containing groove in a composite inner layer circuit structure, having a component connecting end of a circuit layer protruding from a mounting side wall in the chip containing groove, mounting a chip component in the chip containing groove, and connecting the surface bonding pad to the component connecting end. The chip component in the present invention penetrates at least two circuit layers, and the surface bonding pad is bonded to the component connecting end of the circuit layer directly, reducing the occupied area of the chip component in each one of the circuit layers, and increasing the area for circuit disposing and the possible amount of chip components that may be mounted in the substrate.

A multilayer ceramic capacitor includes a ceramic main including first internal electrodes each drawn out to and reaching a pair of end surfaces and second internal electrodes each drawn out to and reaching a pair of side surfaces. A pair of end-surface external electrodes are respectively provided on the pair of end surfaces to be connected to the first internal electrodes, and a pair of side-surface external electrodes are respectively provided on the pair of side surfaces to be connected to the second internal electrodes. Each of the second internal electrodes has drawn-out parts that extend from an electrode main part and reach the pair of side surfaces, and with respect to each of the pair of side surfaces, two or more of the drawn-out parts are provided to extend from the electrode main part and reach the side surface.

Various circuit boards with mounted passive components and method of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes at least partially encapsulating a first plurality of passive components in a molding material to create a first molded passive component group. The first molded passive component group is mounted on a surface of a circuit board. The first plurality of passive components are electrically connected to the circuit board.

A multilayer ceramic electronic component includes multilayer ceramic electronic component bodies each including a laminate and first and second outer electrodes respectively disposed on two end surfaces of the laminate, first and second metal terminals respectively connected to the first and second outer electrodes, and first and second terminal blocks respectively connected to the first and second metal terminals. A thickness dimension of each multilayer ceramic electronic component body in a height direction is less than a width dimension of the multilayer ceramic electronic component body in a width direction. Each multilayer ceramic electronic component body is disposed such that a first or second side surface faces a mounting surface. The first and second metal terminals are respectively disposed astride the first and second outer electrodes of the multilayer ceramic electronic component bodies.

An apparatus and method for providing an artificial standoff to the bottom of leads on a QFN device sufficient to provide a gap that changes the fluid dynamics of solder flow and create a unique capillary effect that drives solder up the of leads of a UN device when it is attached to a printed wiring board (PWB).

Various circuit boards with mounted passive components and method of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes at least partially encapsulating a first plurality of passive components in a molding material to create a first molded passive component group. The first molded passive component group is mounted on a surface of a circuit board. The first plurality of passive components are electrically connected to the circuit board.

A multi-layer ceramic electronic component includes a ceramic body and a pair of external electrodes. The ceramic body includes a pair of main surfaces perpendicular to a first axis, a pair of end surfaces perpendicular to a second axis, a pair of side surfaces perpendicular to a third axis, and internal electrodes drawn to the end surfaces, and has a substantially rectangular parallelepiped shape. The external electrodes each include an end-surface-covering portion that covers one of the end surfaces, and a main-surface-covering portion that is formed to be continuous from the end-surface-covering portion and covers a part of the main surface. The main-surface-covering portion includes a conductive resin layer, and first and second convex portions formed on the basis of a shape of the conductive resin layer, each swelling toward the center in the direction of the second axis, and disposed apart from each other in the third axis direction.

Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate includes a first pair and a second of electrical contacts on a first surface of the substrate. The first pair of electrical contacts can be configured to receive a first surface-mount capacitor, and the second pair of electrical contacts can be configured to receive a second surface-mount capacitor. The first pair of electrical contacts can be spaced apart by a first space, and the second pair of electrical contacts can be spaced apart by a second space. The first and second spaces can correspond to corresponding to first and second distances between electrical contacts of first and second surface-mount capacitors.