There has been a problem of generating anti-resonance between a three-terminal capacitor and a capacitor when the three-terminal capacitor and the capacitor are mounted. In order to solve the problem, this electronic circuit includes: a capacitor and a three-terminal capacitor, which are connected to a power supply terminal of a circuit component, and a power supply, and which are connected in parallel to each other between the power supply and ground; and a resistor that is connected in series between the ground and a ground terminal of the three-terminal capacitor and/or the capacitor.

A semiconductor apparatus includes a metal body in which a through hole is formed, a socket that covers the metal body without closing the through hole, a connection terminal connected to the metal body and exposed to an outside of the socket, a control board having a metal pattern and a circuit pattern, and a semiconductor chip having a control terminal connected to the circuit pattern via the through hole without being in contact with the metal body, the connection terminal being connected to the metal pattern.

An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.

A circuit module includes a circuit board including an insulating layer, first and second signal conductors, a ground conductor, and a ground conductor layer; and an electronic component including first and second signal terminals and a first ground terminal. The ground conductor includes a first strip portion parallel to the first and second signal conductors. When a portion of the first signal conductor parallel to the second signal conductor and the first signal terminal are set as a first signal wiring line and a portion of the second signal conductor parallel to the first signal conductor and the second signal terminal are set as a second signal wiring line, the circuit board includes a first strip portion connection via conductor that connects the first strip portion and the ground conductor layer in a region where the first and second signal wiring lines are parallel to each other.

An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.

Apparatuses and methods for routing and transmitting signals in an electronic device are described. Various signal paths may be routed to avoid or limit reference transitions or transitions between layers of a structure of a device (e.g., printed circuit board (PCB)). In a memory module, for example, different data inputs/outputs (e.g., DQs) may be routed through different layers of a PCB according to their relative location to one another. For instance, DQs associated with even bits of a byte may be routed on one layer of a PCB near one ground plane, and DQs associated with odd bits of the byte may be routed on a different layer of the PCB near another ground plane.

A semiconductor package includes: a die carrier having a first main face and a second main face opposite to the first main face; a semiconductor die disposed on the die carrier, the semiconductor die including a first pad and a second pad; a first electrical connector disposed on the first pad; an encapsulant at least partially covering the semiconductor die, the die carrier, and the first electrical connector; and an insulation layer disposed on the second main face of the die carrier.

An electrical apparatus that includes: an electronic substrate having a plurality of pads for connecting to an electronic component placed on the electronic substrate; a shield placed on a surface of the electronic substrate, the shield having a plurality of openings with the plurality of openings aligned over the plurality of pads and at least a portion of each of the plurality of openings being conductive; connection means to connect the conductive portions of each of the plurality of openings to a fault detect and error handling circuit; and the fault detect and error handling circuit to detect a short circuit between at least one of the conductive portions and the pad aligned with the opening containing the at least one of the conductive portions.

A circuit apparatus is mounted in a vehicle. In a circuit board, a plurality of first conductive patterns and a second conductive pattern are disposed on an insulating layer. An integrated circuit device is disposed on the plurality of first conductive patterns. The integrated circuit device is electrically connected to the plurality of first conductive patterns. A busbar is connected to the second conductive pattern.

An IC assembly including an exposed pad integrated circuit (“IC”) package having a thermal pad with a top surface and a bottom surface and with at least one peripheral surface portion extending transversely of and continuous with the bottom surface. The bottom surface and the at least one peripheral surface are exposed through a layer of mold compound. Also, methods of making an exposed pad integrated circuit (“IC”) package assembly. One method includes optically inspecting a solder bond bonding a thermal pad of an exposed pad IC package to a printed circuit board. Another method includes wave soldering an exposed pad of an IC package to a printed circuit board.