A connection arrangement for forming a component carrier structure is disclosed. The connection arrangement includes a first electrically conductive connection element and a second electrically conductive connection element. The first connection element and the second connection element are configured such that, upon connecting the first connection element with the second connection element along a connection direction, a form fit is established between the first connection element and the second connection element that limits a relative motion between the first connection element and the second connection element in a plane perpendicular to the connection direction. A component carrier and a method of forming a component carrier structure are also disclosed.

A device includes a substrate with an excitation coil configured to generate a magnetic field in reaction to an input signal fed in, and with a pickup coil arrangement configured to generate an output signal in reaction to a magnetic field. The excitation coil includes one or more turns arranged around the pickup coil arrangement in a ring-shaped manner in a plan view of the substrate plane. The device further includes a chip package comprising at least one electrical connection connected to the pickup coil arrangement by means of a signal-carrying conductor. In accordance with the concept described herein, the chip package is positioned on the substrate in such a way that the signal-carrying conductor and the one or more turns of the excitation coil do not overlap in a plan view of the substrate plane.

A semiconductor device includes a semiconductor package equipped with a plurality of electrodes and a mount member which is equipped with a plurality of lands and on which the semiconductor package is mounted. The semiconductor package has the electrodes joined to the lands through solders. One of the electrodes is designed as a position/orientation control electrode for the semiconductor package. One of the lands is designed as a position/orientation control land for the semiconductor package. The position/orientation control land is arranged inside the position/orientation control electrode in a planar view thereof and includes a plurality of first extensions which extend in different radial directions about the center of the semiconductor package. The position/orientation control electrode includes a plurality of second extensions which extend along the first extensions. Each of the first extension has an outer portion which is located outside an outer line of a facing one of the second extensions. The outer portions are arranged to be symmetrical with respect to the center of the semiconductor package.

A device includes a substrate with an excitation coil configured to generate a magnetic field in reaction to an input signal fed in, and with a pickup coil arrangement configured to generate an output signal in reaction to a magnetic field. The excitation coil includes one or more turns arranged around the pickup coil arrangement in a ring-shaped manner in a plan view of the substrate plane. The device further includes a chip package comprising at least one electrical connection connected to the pickup coil arrangement by means of a signal-carrying conductor. In accordance with the concept described herein, the chip package is positioned on the substrate in such a way that the signal-carrying conductor and the one or more turns of the excitation coil do not overlap in a plan view of the substrate plane.

The disclosure provides a circuit board that includes: a carrier element having a number of circuit board layers; a number of electronic components; a number of thermal interfaces; and a number of electrical interfaces. The electronic components are arranged directly on at least one of the surface sides on the carrier element. The opposite surface side of the carrier element is of potential-free design. Additionally, the circuit board with the electronic components is overlaid by a covering material in such a way that the electronic components are mechanically stabilized and the thermal and/or electrical interfaces are free of the covering material.

An integrated circuit includes a main body having a top and a bottom; and upper pins placed on the top of the main body, and lower pins placed on the bottom of the main body, in which each of the upper pins has a first protruding portion protruding toward outside from a side or the top of the main body, and each of the lower pins has a second protruding portion protruding toward outside from the side or the bottom of the main body.

According to one aspect of the present invention, a lead-free solder alloy includes 2% by mass or more and 3.1% by mass or less of Ag, more than 0% by mass and 1% by mass or less of Cu, 1% by mass or more and 5% by mass or less of Sb, 3.1% by mass or more and 4.5% by mass or less of Bi, 0.01% by mass or more and 0.25% by mass or less of Ni, and Sn.

A connection arrangement for forming a component carrier structure is disclosed. The connection arrangement includes a first electrically conductive connection element and a second electrically conductive connection element. The first connection element and the second connection element are configured such that, upon connecting the first connection element with the second connection element along a connection direction, a form fit is established between the first connection element and the second connection element that limits a relative motion between the first connection element and the second connection element in a plane perpendicular to the connection direction. A component carrier and a method of forming a component carrier structure are also disclosed.

A surface-mounted integrated circuit (IC) package is disclosed that has unwanted flux removed from surface-mounted IC. A bottom termination component (BTC) includes lands and a thermal pad. The lands provide an electrical connection from the BTC and the thermal pad provides heat transfer from the BTC. The thermal pad includes vias that are configured to remove flux generated from solder applied to the surface-mounted IC as the surface-mounted IC is assembled. A printed circuit board (PCB) is mourned to the BTC and is electrically connected to the BTC via the lands and receives heat transfer from the BTC via the thermal pad and includes a reservoir. The reservoir is configured to pull flux positioned between the lands into the reservoir as the flux is generated from the solder applied to the surface-mounted IC as the BTC is mounted to the PCB and as the surface-mounted IC is assembled.

A conformal coating control method includes arranging at least one conformal control surface feature on a surface of a printed circuit board proximate perimeter pads of an integrated circuit. The method also includes soldering, to the printed circuit board, the integrated circuit. The method also includes applying a conformal coating material to the printed circuit board, wherein the conformal coating material is at least partially restricted from flowing between the integrated circuit and the printed circuit board by solder flux residue accumulated proximate the conformal control surface feature.