Provided are a polymer thin-film transistor and a method of fabricating the same. Donor-acceptor copolymer-based field-effect transistors (FETs) have attracted considerable attention from technological and academic perspectives due to their low band gap, high mobility, low cost, easy solution processability, flexibility, and stretchability. Large-area films can be formed through meniscus-guided coating among various solution-processing techniques. 29-Diketopyrrolopyrrole-selenophene vinylene selenophene (29-DPP-SVS) donor-acceptor copolymer-based FETs have already shown excellent performance due to their short π-π stacking distance and strong π-π interaction. Charge carrier mobility of these types of semiconductor materials significantly depends on an applied electric field. Accordingly, detailed analysis of the electric-field dependency of charge carrier mobility is necessary to understand the transport mechanism within the material. Therefore, 29-DPP-S VS-based FETs are fabricated by varying the blade coating (BC) speed of a semiconductor layer. The effect of the BC speed on the electrical characteristics of the FETs is studied through the analysis of electric-field-dependent mobility. The results show that the charge carrier mobility of different FETs depends on the applied electric field and that the type of dependency is Poole-Frenkel. At an optimized BC speed (2 mm s.sup.−1), the device shows maximum zero-field mobility (3.39 cm.sup.2V.sup.−1s.sup.−1) due to the low trap density within the conductive channel.

A method is provided for modifying a surface of a solid conducting material, which includes applying a potential difference between this surface and a surface of another conducting solid material positioned facing it, and wherein, simultaneously, the surface (S) is put into contact with a liquid medium comprising in solution triarylamines (I): ##STR00001##
while subjecting these triarylamines (I) to electromagnetic radiation, at least partly converting them at into triarylammonium radicals. Also provided is a conducting device which includes two conducting metal materials, the surfaces of which, (S) and (S′) respectively, are electrically interconnected through an organic material comprising conducting fibrillar organic supramolecular species comprising an association of triarylamines of formula (I).

A transistor has a substrate, source and drain electrodes on the substrate, the source and drain electrodes formed of a conductor ink having silver nanoparticles with integrated dipolar surfactants, an organic semiconductor forming a channel between the source and drain electrodes, the organic semiconductor in contact with the source and drain electrodes, a gate dielectric layer having a first surface in contact with the organic semiconductor, and a gate electrode in contact with a second surface of the gate dielectric layer, the gate electrode formed of silver nanoparticles with integrated dipolar surfactants.

A transistor device (10) is disclosed comprising a source electrode (14) a drain electrode (12) and an enzyme (31) for facilitating generation of a charge carrier from an analyte. The transistor device also comprises a polymer layer (30) for retaining the enzyme (31), the polymer layer (30) being conductive to the charge carrier. The device also comprises an ohmic conductor (32) in contact with said polymer layer (30) for applying a gate voltage to said polymer layer (30). The device also comprises an organic semiconducting layer (18) connecting the source electrode (14) to the drain electrode (12). Also disclosed is a method of making and using the device (10).

A method of p-type doping a carbon nanotube includes the following steps: providing a single carbon nanotube; providing a layered structure, wherein the layered structure is a tungsten diselenide film or a black phosphorus film; and p-type doping at least one portion of the carbon nanotube by covering the carbon nanotube with the layered structure.

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

The present invention provides compounds of formula ##STR00001##
a process for their preparation, a solution comprising these compounds, a process for the preparation of a device using the solution, devices obtainable by the process and the use of the bis-azide-type compounds as cross-linkers.

An organic light emitting diode display includes a substrate, a semiconductor, a gate electrode, a source electrode connected to a first portion of the semiconductor, a drain electrode connected to a second portion of the semiconductor, and a pixel electrode connected to the drain electrode. Each of the source electrode, the drain electrode, and the pixel electrode includes a barrier metal layer, a low resistance metal layer, a metal oxide layer, and a contact assistant layer disposed between the low resistance metal layer and the metal oxide layer. The source electrode, the drain electrode, and the pixel electrode each have a step shape.

A polymer includes a first repeating unit and a second repeating unit forming a main chain, the first repeating unit including at least one first conjugated system, and the second repeating unit including at least one second conjugated system and a multiple hydrogen bonding moiety represented by Chemical Formula 1.

Technologies are generally described for a four-terminal, gate-controlled, thin-film thyristor device. The thyristor device may essentially be an n-type thin-film transistor (TFT) with an additional emitter terminal. The thyristor device may exhibit an S-shaped negative differential resistance (NDR) characteristic resulting from conductance modulation. The conductance modulation may be caused by formation of a secondary channel for current flow due to an inherent structure of the device. The secondary channel may be formed in a semiconductor area within the device, the semiconductor area including a hole transporting organic semiconductor layer (HTL) and an electron transporting organic semiconductor layer (ETL). A gate terminal of the thyristor device may further allow onset of NDR characteristics to be controlled and may allow the device to be switched off.