Patent classifications
H10K10/468
Semiconductor device
The oxide semiconductor film has the top and bottom surface portions each provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film. An insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is further formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film. The oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by removing impurities such as hydrogen, moisture, a hydroxyl group, and hydride from the oxide semiconductor and supplying oxygen which is a major constituent of the oxide semiconductor and is simultaneously reduced in a step of removing impurities.
THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME AND THIN FILM TRANSISTOR PANEL AND ELECTRONIC DEVICE
A thin film transistor includes a gate electrode, a semiconductor layer overlapped with the gate electrode, a gate insulating layer between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode electrically connected to the semiconductor layer. The semiconductor layer includes a plurality of holes. The gate insulating layer may include a plurality of recess portions at a surface of the gate insulating layer facing the semiconductor layer. A method of manufacturing the thin film transistor is provided. A thin film transistor array panel and an electronic device may include the thin film transistor.
Patterning method for preparing top-gate, bottom-contact organic field effect transistors
The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer block B is attached to the polymer block A, and wherein at least 60 mol % of the repeat units of polymer block B are selected from the group consisting of Formulas (1A), (1B), (1C), (1D), (1E) and (1F), wherein R.sup.1, R.sup.2, R.sup.3, R.sup.4, R.sup.5, R.sup.6, R.sup.7 and R.sup.8 are independently and at each occurrence H or C.sub.1-C.sub.10-alkyl. ##STR00001##
Thin film transistor and method of manufacturing the same and thin film transistor panel and electronic device
A thin film transistor includes a gate electrode, a semiconductor layer overlapped with the gate electrode, a gate insulating layer between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode electrically connected to the semiconductor layer. The semiconductor layer includes a plurality of holes. The gate insulating layer may include a plurality of recess portions at a surface of the gate insulating layer facing the semiconductor layer. A method of manufacturing the thin film transistor is provided. A thin film transistor array panel and an electronic device may include the thin film transistor.
Method of manufacturing a field effect transistor using carbon nanotubes and a field effect transistor
In a method of forming a gate-all-around field effect transistor (GAA FET), a fin structure is formed. The fin structure includes a plurality of stacked structures each comprising a dielectric layer, a CNT over the dielectric layer, a support layer over the CNT. A sacrificial gate structure is formed over the fin structure, an isolation insulating layer is formed, a source/drain opening is formed by patterning the isolation insulating layer, the support layer is removed from each of the plurality of stacked structures in the source/drain opening, and a source/drain contact layer is formed in the source/drain opening. The source/drain contact is formed such that the source/drain contact is in direct contact with only a part of the CNT and a part of the dielectric layer is disposed between the source/drain contact and the CNT.
Nanofilm, thin film transistor, and manufacture methods thereof
Disclosed is a nanofilm, a thin film transistor and manufacture methods thereof. The nanofilm of the present disclosure comprises a plurality of regions distributed in a film plane dimension, wherein each of the regions is composed of one kind of nanomaterial, and nanomaterials of adjacent regions are different from each other and contact with each other to form a heterojunction or a Schottky junction.
PATTERNING METHOD FOR PREPARING TOP-GATE, BOTTOM-CONTACT ORGANIC FIELD EFFECT TRANSISTORS
The present invention relates to a process for the preparation of a top-gate, bottom-contact organic field effect transistor on a substrate, which organic field effect transistor comprises source and drain electrodes, a semiconducting layer, a cured first dielectric layer and a gate electrode, and which process comprises the steps of: i) applying a composition comprising an organic semiconducting material to form the semiconducting layer, ii) applying a composition comprising a first dielectric material and a crosslinking agent carrying at least two azide groups to form a first dielectric layer, iii) curing portions of the first dielectric layer by light treatment, iv) removing the uncured portions of the first dielectric layer, and v) removing the portions of the semiconducting layer that are not covered by the cured first dielectric layer, wherein the first dielectric material comprises a star-shaped polymer consisting of at least one polymer block A and at least two polymer blocks B, wherein each polymer block B is attached to the polymer block A, and wherein at least 60 mol % of
the repeat units of polymer block B are selected from the group consisting of Formulas (1A), (1B), (1C), (1D), (1E) and (1F), wherein R.sup.1, R.sup.2, R.sup.3, R.sup.4, R.sup.5, R.sup.6, R.sup.7 and R.sup.8 are independently and at each occurrence H or C.sub.1-C.sub.10-alkyl.
##STR00001##
SEMICONDUCTOR DEVICE
The oxide semiconductor film has the top and bottom surface portions each provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film. An insulating film containing a different constituent from the metal oxide film and the oxide semiconductor film is further formed in contact with a surface of the metal oxide film, which is opposite to the surface in contact with the oxide semiconductor film. The oxide semiconductor film used for the active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by removing impurities such as hydrogen, moisture, a hydroxyl group, and hydride from the oxide semiconductor and supplying oxygen which is a major constituent of the oxide semiconductor and is simultaneously reduced in a step of removing impurities.
METHOD OF MANUFACTURING A FIELD EFFECT TRANSISTOR USING CARBON NANOTUBES AND A FIELD EFFECT TRANSISTOR
In a method of forming a gate-all-around field effect transistor (GAA FET), a fin structure is formed. The fin structure includes a plurality of stacked structures each comprising a dielectric layer, a CNT over the dielectric layer, a support layer over the CNT. A sacrificial gate structure is formed over the fin structure, an isolation insulating layer is formed, a source/drain opening is formed by patterning the isolation insulating layer, the support layer is removed from each of the plurality of stacked structures in the source/drain opening, and a source/drain contact layer is formed in the source/drain opening. The source/drain contact is formed such that the source/drain contact is in direct contact with only a part of the CNT and a part of the dielectric layer is disposed between the source/drain contact and the CNT.
Organic thin film transistor and method of manufacturing the same
An organic thin film transistor (OTFT) is provided. The OTFT includes a substrate, a first electrode layer disposed on a top surface of the substrate, an organic active layer disposed on a top surface of the first electrode layer, a second electrode layer disposed in the organic active layer and including a base electrode, a plurality of pinholes formed in the base electrode and providing charge transfer paths, and a metal oxide configured to surround a surface of the base electrode and the pinholes, and a third electrode layer disposed on the organic active layer.