A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

Devices include a substrate, a collector layer, and an emitter layer positively biased relative to the collector. Devices further include a semiconductor layer located between the collector and the emitter. The semiconductor layer includes an organic semiconductor polymer with a donor-acceptor structure.

A carbon nanotube composition capable of producing an FET having improved mobility is provided. The carbon nanotube composition of the present invention is a halogen-free carbon nanotube composition comprising a carbon nanotube having the following features (1) and (2).

(1) A dispersion liquid obtained by dispersing the carbon nanotube in a solution containing a cholic acid derivative and water has, in the absorption spectrum in the wavelength range of 300 nm to 1100 nm measured by an ultraviolet/visible/near-infrared spectroscopy, the minimum absorbance in the range of 600 nm to 700 nm and the maximum absorbance in the range of 900 nm to 1050 nm; wherein the ratio of the minimum absorbance and the maximum absorbance is 2.5 or more and 4.5 or less; and
(2) the dispersion liquid has the height ratio of the G-band and the D-band (value of (D/G)×100) of 3.33 or less, as measured by a Raman spectrophotometer, using light having a wavelength of 532 nm as excitation light.

Electrical device including a substrate having a surface and a radiofrequency field effect transistor (RF-FET) on the substrate surface. RF-FET includes a CNT layer on the substrate surface, the CNT layer including electrically conductive aligned carbon nanotubes, and pin-down anchor layers on the CNT layer. A first portion of the CNT layer, located in-between the pin-down anchor layers, is not covered by the pin-down anchor layers and is a channel region of the radiofrequency field effect transistor and second portions of the CNT layer are covered by the pin-down anchor layers. For cross-sections in a direction perpendicular to a common alignment direction of the aligned CNTs in the first portion of the CNT layer: the aligned CNTs have an average linear density in a range from 20 to 120 nanotubes per micron along the cross-section, and at least 40 percent of the aligned CNTs are discrete from any CNTs of the CNT layer.

In a method of forming a gate-all-around field effect transistor (GAA FET), a fin structure is formed. The fin structure includes a plurality of stacked structures each comprising a dielectric layer, a CNT over the dielectric layer, a support layer over the CNT. A sacrificial gate structure is formed over the fin structure, an isolation insulating layer is formed, a source/drain opening is formed by patterning the isolation insulating layer, the support layer is removed from each of the plurality of stacked structures in the source/drain opening, and a source/drain contact layer is formed in the source/drain opening. The source/drain contact is formed such that the source/drain contact is in direct contact with only a part of the CNT and a part of the dielectric layer is disposed between the source/drain contact and the CNT.

A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduced the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.

Devices, structures, materials and methods for vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Porous conductive transparent electrodes (such as from nanowires (NW)) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, porous conductive electrodes and relevant substrates and gates are utilized to construct LETs, including singly and doubly gated VPLETs. In addition, printing processes are utilized to deposit layers of one or more of porous conductive electrodes, LEDs, and dielectric materials on various substrates to construct LETs, including singly and doubly gated VPLETs.

Devices, structures, materials and methods for carbon enabled vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Carbon electrodes (such as from graphene) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, carbon electrodes and relevant substrates and gates are utilized to construct LETs, including heterojunction VOLETs.

In a method of forming a gate-all-around field effect transistor, a gate structure is formed surrounding a channel portion of a carbon nanotube. An inner spacer is formed surrounding a source/drain extension portion of the carbon nanotube, which extends outward from the channel portion of the carbon nanotube. The inner spacer includes two dielectric layers that form interface dipole. The interface dipole introduces doping to the source/drain extension portion of the carbon nanotube.

The current disclosure describes techniques for forming semiconductor structures having multiple semiconductor strips configured as channel portions. In the semiconductor structures, diffusion break structures are formed after the gate structures are formed so that the structural integrity of the semiconductor strips adjacent to the diffusion break structures will not be compromised by a subsequent gate formation process. The diffusion break extends downward from an upper surface until all the semiconductor strips of the adjacent channel portions are truncated by the diffusion break.