Patent classifications
H01F10/132
Method of manufacturing a magnetoresistive random access memory (MRAM)
The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
MAGNETO-RESISTANCE ELEMENT IN WHICH I-III-VI2 COMPOUND SEMICONDUCTOR IS USED, METHOD FOR MANUFACTURING SAID MAGNETO-RESISTANCE ELEMENT, AND MAGNETIC STORAGE DEVICE AND SPIN TRANSISTOR IN WHICH SAID MAGNETO-RESISTANCE ELEMENT IS USED
An object of the present invention is to provide a Magneto-Resistance (MR) element showing a high Magneto-Resistance (MR) ratio and having a suitable Resistance-Area (RA) for device applications. The MR element of the present invention has a laminated structure including a first ferromagnetic layer 16, a non-magnetic layer 18, and a second ferromagnetic layer 20 on a substrate 10, wherein the first ferromagnetic layer 16 includes a Heusler alloy, the second ferromagnetic layer 20 includes a Heusler alloy, the non-magnetic layer 18 includes a I-III-VI.sub.2 chalcopyrite-type compound semiconductor, and the non-magnetic layer 18 has a thickness of 0.5 to 3 nm, and wherein the MR element shows a Magneto-Resistance (MR) change of 40% or more, and has a resistance-area (RA) of 0.1 [m.sup.2] or more and 3 [m.sup.2] or less.
Magnetic tunnel junction device
The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
MAGNETORESISTIVE ELEMENT AND ELECTRONIC DEVICE
A magnetoresistive element 10 is formed by laminating a lower electrode 31, a first ground layer 21A including a non-magnetic material, a storage layer 22 having perpendicular magnetic anisotropy, an intermediate layer 23, a magnetization fixed layer 24, and an upper electrode 32. The storage layer 22 includes a magnetic material including at least a 3d transition metal element and a boron element in a composition. A second ground layer 21B is further included between the lower electrode 31 and the first ground layer 21A. The second ground layer 21B includes a material including at least one kind of element among elements constituting the storage layer in a composition.
CRYOGENIC PATTERNING OF MAGNETIC TUNNEL JUNCTIONS
Methods for forming magnetic tunnel junctions and structures thereof include cryogenic etching the layers defining the magnetic tunnel junction without lateral diffusion of reactive species.
TUNNEL MAGNETIC RESISTANCE ELEMENT AND METHOD FOR MANUFACTURING SAME
A tunnel magnetic resistance element includes the following, a fixed magnetic layer with a fixed direction of magnetization, a free magnetic layer in which the direction of magnetization changes, and an insulating layer which is positioned between the fixed magnetic layer and the free magnetic layer. The fixed magnetic layer, the free magnetic layer, and the insulating layer form a magnetic tunnel junction. A resistance of the insulating layer changes by a tunnel effect according to a difference in an angle between the direction of magnetization of the fixed magnetic layer and the direction of magnetization of the free magnetic layer. The free magnetic layer includes a ferromagnetic layer, a soft magnetic layer, and a magnetic bonding layer placed in between. Material of the magnetic bonding layer include Ru or Ta, and a layer thickness is 1.0 nm to 1.3 nm.
Cryogenic patterning of magnetic tunnel junctions
Methods for forming magnetic tunnel junctions and structures thereof include cryogenic etching the layers defining the magnetic tunnel junction without lateral diffusion of reactive species.
METHOD OF MANUFACTURING A MAGNETORESISTIVE RANDOM ACCESS MEMORY (MRAM)
The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
Integrated circuits and coupled inductors with isotropic magnetic cores, and methods for fabricating the same
Integrated circuits and coupled inductors with isotropic magnetic cores, and methods for fabricating integrated circuits and coupled inductors with isotropic magnetic cores are provided. In an embodiment, a method for fabricating an integrated circuit is provided. The method includes providing a semiconductor substrate and forming an isotropic magnetic core bottom yoke over the semiconductor substrate. Further, the method includes forming an inductor coil over the isotropic magnetic core bottom yoke. Also, the method includes forming isotropic magnetic core sidewalls over the isotropic magnetic core bottom yoke and around the inductor coil. The method includes forming an isotropic magnetic core top yoke over the isotropic magnetic core sidewalls and over the inductor coil.
INTEGRATED CIRCUITS AND COUPLED INDUCTORS WITH ISOTROPIC MAGNETIC CORES, AND METHODS FOR FABRICATING THE SAME
Integrated circuits and coupled inductors with isotropic magnetic cores, and methods for fabricating integrated circuits and coupled inductors with isotropic magnetic cores are provided. In an embodiment, a method for fabricating an integrated circuit is provided. The method includes providing a semiconductor substrate and forming an isotropic magnetic core bottom yoke over the semiconductor substrate. Further, the method includes forming an inductor coil over the isotropic magnetic core bottom yoke. Also, the method includes forming isotropic magnetic core sidewalls over the isotropic magnetic core bottom yoke and around the inductor coil. The method includes forming an isotropic magnetic core top yoke over the isotropic magnetic core sidewalls and over the inductor coil.