A method for processing semiconductor wafer is provided. The method includes loading a semiconductor wafer on a top surface of a wafer chuck. The method also includes supplying a gaseous material between the semiconductor wafer and the top surface of the wafer chuck through a first gas inlet port and a second gas inlet port located underneath a fan-shaped sector of the top surface. The method further includes supplying a fluid medium to a fluid inlet port of the wafer chuck and guiding the fluid medium from the fluid inlet port to flow through a number of arc-shaped channels located underneath the fan-shaped sector of the top surface. In addition, the method includes supplying a plasma gas over the semiconductor wafer.

A capacitively coupled plasma substrate processing apparatus includes: a process chamber which is exhausted to vacuum and provides a sealed internal space; a gas inflow pipe which is connected to the process chamber to provide a process gas into the process chamber; a gas distribution unit which is connected to the gas inflow pipe to inject the process gas flowing into the gas inflow pipe in the internal space; an impedance matching network which is disposed outside the process chamber and transfers an RF power of an RF power supply to the gas distribution unit; an RF connection line which connects an output of the impedance matching network to the gas inflow pipe or the gas distribution unit; and a shielding plate which is configured such that at least one of the RF connection line and the gas inflow pipe penetrates the shielding plate and includes a ferromagnetic material.

A method for manufacturing a sputtering target with which an oxide semiconductor film with a small amount of defects can be formed is provided. Alternatively, an oxide semiconductor film with a small amount of defects is formed. A method for manufacturing a sputtering target is provided, which includes the steps of: forming a polycrystalline In-M-Zn oxide (M represents a metal chosen among aluminum, titanium, gallium, yttrium, zirconium, lanthanum, cesium, neodymium, and hafnium) powder by mixing, sintering, and grinding indium oxide, an oxide of the metal, and zinc oxide; forming a mixture by mixing the polycrystalline In-M-Zn oxide powder and a zinc oxide powder; forming a compact by compacting the mixture; and sintering the compact.

Exemplary semiconductor processing chambers may include a chamber body including sidewalls and a base. The chambers may include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate. The substrate support may include a shaft coupled with the support platen. The substrate support may include a shield coupled with the shaft of the substrate support. The shield may include a plurality of apertures defined through the shield. The substrate support may include a block seated in an aperture of the shield.

A deposition chamber includes a vacuum enclosure, an electrostatic chuck having a flat top surface located within a vacuum enclosure, a lift-and-rotation unit extending through or laterally surrounding the electrostatic chuck at a position that is laterally offset from a vertical axis passing through a geometrical center of the electrostatic chuck, a gas supply manifold configured to provide influx of gas into the vacuum enclosure, and a pumping port connected to the vacuum enclosure.

A ground shield of a processing chamber includes a ceramic body including a ground shield plate, a raised edge extending from an upper surface of the ground shield plate, and a hollow shaft that extends from a lower surface of the ground shield plate. An electrically conductive layer is formed on and conforms to at least the upper surface of the ground shield plate and an interior surface of the hollow shaft. A first protective layer is formed on at least the electrically conductive layer. A heater plate of a heater first within the raised edge and on the ground shield plate such that the heater plate is disposed on top of the first protective layer, the electrically conductive layer, and the upper surface of the ground shield plate.

Embodiments are directed to a method of optimizing thickness of a target material film deposited on a semiconductor substrate in a semiconductor processing chamber, wherein the semiconductor processing chamber includes a magnetic assembly positioned on the semiconductor processing chamber, the magnetic assembly including a plurality of magnetic columns within the magnetic assembly. The method includes operating the semiconductor processing chamber to deposit a film of target material on a semiconductor substrate positioned within the semiconductor processing chamber, measuring an uniformity of the deposited film, adjusting a position of one or more magnetic columns in the magnetic assembly, and operating the semiconductor processing chamber to deposit the film of the target material after adjusting position of the one or more magnetic columns.

A substrate processing method capable of improving thin film uniformity on a substrate by controlling the position of a substrate supporting apparatus includes: a first operation of moving the substrate supporting apparatus in a first direction by a first predetermined distance; a second operation of moving the substrate supporting apparatus in a second direction by a second predetermined distance; a third operation of moving the substrate supporting apparatus in the second direction by the first predetermined distance; and a fourth operation of moving the substrate supporting apparatus in the first direction by the second predetermined distance, wherein the second direction may be opposite to the first direction.

There is provided a substrate processing apparatus that includes a substrate support configured to support one or more substrates, a process chamber in which the one or more substrates are processed, a gas supplier configured to supply gas, and a plasma generator including a plurality of first rod-shaped electrodes connected to a high-frequency power supply; and a second rod-shaped electrode installed between two first rod-shaped electrodes is grounded; and a buffer structure configured to accommodate the plurality of first rod-shaped electrodes and the second rod-shaped electrode, and having a first wall surface on which a gas supply port that supplies gas into the process chamber is installed. Wherein the plasma generator is configured to convert gas into plasma by the plurality of first rod-shaped electrodes and the second rod-shaped electrode to supply the plasma-converted gas to the process chamber from the gas supply port.

Exemplary methods of semiconductor processing may include delivering a deposition precursor into a processing region of a semiconductor processing chamber. The methods may include depositing a layer of material on a substrate housed in the processing region of the semiconductor processing chamber. The processing region may be maintained at a first pressure during the deposition. The methods may include extending a baffle within the processing region. The baffle may modify a flow path within the processing region. The methods may include forming a plasma of a treatment or etch precursor within the processing region of the semiconductor processing chamber. The processing region may be maintained at a second pressure during the forming. The methods may include treating the layer of material deposited on the substrate with plasma effluents of the treatment precursor. The processes may be cycled any number of times.