The present invention provides a method for treating a substrate, which can remove transition metal-containing substances on a substrate with high efficiency while inhibiting cerium from remaining on the surface of the treated substrate. Furthermore, the present invention provides a method for manufacturing a semiconductor device including the method for treating a substrate, and a kit for treating a substrate that is applicable to the method for treating a substrate. The method for treating a substrate according to an embodiment of the present invention includes a step A of removing a transition metal-containing substance on a substrate by using a chemical solution, which includes a cerium compound and one or more pH adjusters selected from the group consisting of nitric acid, perchloric acid, ammonia, and sulfuric acid, for the substrate having the transition metal-containing substance, and a step B of performing a rinsing treatment on the substrate obtained by the step A by using one or more rinsing solutions selected from the group consisting of a solution including hydrogen peroxide and an acidic aqueous solution which is other than hydrofluoric acid, nitric acid, an aqueous perchloric acid solution, an aqueous oxalic acid solution, and a mixed aqueous solution of these and does not include hydrogen peroxide after the step A.

A semiconductor treatment composition includes potassium and sodium, and has a potassium content M.sub.K (ppm) and a sodium content M.sub.Na (ppm) that satisfy M.sub.K/M.sub.Na=5×10.sup.3 to 1×10.sup.5.

A semiconductor treatment composition includes particles having a particle size of 0.1 to 0.3 micrometers in a number of 3×10.sup.1 to 1.5×10.sup.3 per mL.

Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. In one embodiment, a method for capping a copper surface on a substrate is provided which includes positioning a substrate within a processing chamber, wherein the substrate contains a contaminated copper surface and a dielectric surface, exposing the contaminated copper surface to a reducing agent while forming a copper surface during a pre-treatment process, exposing the substrate to a cobalt precursor gas to selectively form a cobalt capping layer over the copper surface while leaving exposed the dielectric surface during a vapor deposition process, and depositing a dielectric barrier layer over the cobalt capping layer and the dielectric surface. In another embodiment, a deposition-treatment cycle includes performing the vapor deposition process and subsequently a post-treatment process, which deposition-treatment cycle may be repeated to form multiple cobalt capping layers.

It is to provide a manufacturing method of a semiconductor device including the following step of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 μg/m.sup.3 and less.

An embodiment method includes: forming a gate stack over a channel region; growing a source/drain region adjacent the channel region; depositing a first ILD layer over the source/drain region and the gate stack; forming a source/drain contact through the first ILD layer to physically contact the source/drain region; forming a gate contact through the first ILD layer to physically contact the gate stack; performing an etching process to partially expose a first sidewall and a second sidewall, the first sidewall being at a first interface of the source/drain contact and the first ILD layer, the second sidewall being at a second interface of the gate contact and the first ILD layer; forming a first conductive feature physically contacting the first sidewall and a first top surface of the source/drain contact; and forming a second conductive feature physically contacting the second sidewall and a second top surface of the gate contact.

A cleaning system for processing a substrate after polishing includes a sulfuric peroxide mix (SPM) module, at least two cleaning elements, and a plurality of robots. The SPM module includes a sulfuric peroxide mix (SPM) cleaner having a first container to hold a sulfuric peroxide mix liquid and five to twenty first supports to hold five to twenty substrates in the liquid in the first container, and a rinsing station having a second container to hold a rinsing liquid and five to twenty second supports to hold five to twenty substrates in the liquid in the second container. Each of the at least two cleaning elements are configured to process a single substrate at a time. Examples of a cleaning element include a megasonic cleaner, a rotating brush cleaner, a buff pad cleaner, a jet spray cleaner, a chemical spin cleaner, a spin drier, and a marangoni drier.

The present disclosure provides a method for fabricating a semiconductor structure that includes a first dielectric layer over a semiconductor substrate, and a first cap layer over the first dielectric layer. The method includes forming a first metal feature in the first dielectric layer; performing a first CMP process on the first metal feature using a first rotation rate; and performing a second CMP process on the first metal feature using a second rotation rate slower than the first rotation rate. The second CMP process may be time-based. The second CMP process may stop on the first cap layer. After performing the second CMP process, the method includes removing the first cap layer. The first CMP process may have a first polishing rate to the first metal feature. The second CMP process may have a second polishing rate to the first metal feature lower than the first polishing rate.

An object of the present invention is to provide a cleaning liquid for semiconductor substrates with a change in the pH of the cleaning liquid caused by dilution being suppressed. A cleaning liquid of the invention is a cleaning liquid for semiconductor substrates that contains a chelating agent, and an acidity constant (pKa) of the chelating agent and a pH of the cleaning liquid satisfy a condition defined by Formula (A):

pKa−1<pH<pKa+1  (A)

A substrate processing method for area selective deposition. The method includes providing a substrate containing a metal film, a metal-containing liner, and a dielectric film, exposing the substrate to a plasma-excited cleaning gas containing 1) N.sub.2 gas and H.sub.2 gas, 2) N.sub.2 gas followed by H.sub.2 gas, or 3) H.sub.2 gas followed by N.sub.2 gas, forming a blocking layer on the metal film and on the metal-containing liner, and selectively depositing a material film on the dielectric film.