H01L21/02587

Epitaxial Blocking Layer for Multi-Gate Devices and Fabrication Methods Thereof
20220254623 · 2022-08-11 ·

A semiconductor device includes a semiconductor substrate having a first lattice constant, a dopant blocking layer disposed over the semiconductor substrate, the dopant blocking layer having a second lattice constant different from the first lattice constant, and a buffer layer disposed over the dopant blocking layer, the buffer layer having a third lattice constant different from the second lattice constant. The semiconductor device also includes a plurality of channel members suspended over the buffer layer, an epitaxial feature abutting the channel members, and a gate structure wrapping each of the channel members.

GERMANIUM PRECURSORS, METHODS OF FORMING THE GERMANIUM PRECURSORS, AND PRECURSOR COMPOSITIONS COMPRISING THE GERMANIUM PRECURSORS

A germanium precursor comprising a chemical formula of Ge(R.sup.1NC(R.sup.3)NR.sup.2)(R.sup.4) where each of R.sup.1, R.sup.2, R.sup.3, and R.sup.4 is independently selected from the group consisting of hydrogen, an alkyl, a substituted alkyl, an alkoxide, a substituted amide, an amine, a substituted amine, and a halogen. Methods of forming the germanium precursor and a precursor composition including the germanium precursor are also disclosed.

Method for producing a semiconductor component

A method for producing a semiconductor component includes: providing a semiconductor body having a first dopant of a first conductivity type; forming a first trench in the semiconductor body starting from a first side; filling the first trench with a semiconductor filler material; forming a superjunction structure by introducing a second dopant of a second conductivity type into the semiconductor body, the semiconductor filler material being doped with the second dopant; forming a second trench in the semiconductor body starting from the first side; and forming a trench structure in the second trench.

GROWTH OF CUBIC CRYSTALLINE PHASE STRUCTURE ON SILICON SUBSTRATES AND DEVICES COMPRISING THE CUBIC CRYSTALLINE PHASE STRUCTURE

A method of forming a semiconductor structure includes providing a substrate comprising a first material portion and a single crystal silicon layer on the first material portion. The substrate further comprises a major front surface, a major backside surface opposing the major front surface, and a plurality of grooves positioned in the major front surface. A buffer layer is deposited in one or more of the plurality of grooves. A semiconductor material is epitaxially grown over the buffer layer and in the one or more plurality of grooves, the epitaxially grown semiconductor material comprising a hexagonal crystalline phase layer and a cubic crystalline phase structure disposed over the hexagonal crystalline phase.

LASER DIODES, LEDS, AND SILICON INTEGRATED SENSORS ON PATTERNED SUBSTRATES
20210234064 · 2021-07-29 ·

The present disclosure falls into the field of optoelectronics, particularly, includes the design, epitaxial growth, fabrication, and characterization of Laser Diodes (LDs) operating in the ultraviolet (UV) to infrared (IR) spectral regime on patterned substrates (PSs) made with (formed on) low cost, large size Si, or GaN on sapphire, GaN, and other wafers. We disclose three types of PSs, which can be universal substrates, allowing any materials (III-Vs, II-VIs, etc.) grown on top of it with low defect and/or dislocation density.

Process for manufacturing a plurality of crystalline semiconductor islands having a variety of lattice parameters
11081521 · 2021-08-03 · ·

A method for manufacturing a plurality of crystalline semiconductor islands having different lattice parameters includes providing a relaxation substrate comprising a support and a flow layer on the support that includes first and second groups of blocks having different viscosities at a relaxation temperature. The relaxation substrate also comprises a plurality of strained crystalline semiconductor islands on the flow layer, the islands of a first group being located on the first group of blocks and islands of a second group being located on the second group of blocks. The relaxation substrate is then heat treated at a relaxation temperature higher than or equal to the glass transition temperature of at least one block of the flow layer to cause differentiated lateral expansion of the first and second groups of islands such that the first and second groups of relaxed islands then have different lattice parameters.

Oxide semiconductor layer and preparation method thereof, device, substrate and means

The present disclosure provides an oxide semiconductor layer and a preparation method thereof, device, substrate, and means, and belongs to the field of semiconductor technologies. The method includes: forming an oxide semiconductor layer having multiply types of regions on a substrate, at least two types of the multiple types of regions having different thicknesses, and adjusting an oxygen content of at least one type of regions in the multiply types of regions, so that the oxygen content and the thickness in the multiple types of regions are positively correlated.

METHOD FOR MANUFACTURING PILLAR-SHAPED SEMICONDUCTOR DEVICE
20210242028 · 2021-08-05 ·

A band-shaped Si pillar having a mask material layer on the top portion thereof is formed on a P+ layer. SiGe layers having mask material layers on the top portions thereof are then formed in contact with the side surfaces of the band-shaped Si pillar and the surfaces of N+ layers and the P+ layer. Si layers having mask material layers on the top portions thereof are then formed in contact with the side surfaces of the SiGe layers and the surfaces of the N+ layers. The outer peripheries of the bottom portions of the Si layers are then removed using the mask material layers as a mask to form band-shaped Si pillars. The mask material layers and the SiGe layers are then removed. Si pillars separated in the Y direction are then formed in the band-shaped Si pillars.

Method of fabricating graphene structure having nanobubbles

Example embodiments relate to a method of manufacturing graphene structures having nanobubbles. The graphene structure includes a graphene layer on a substrate, the graphene layer having a plurality of convex portions and a band gap that is due to the plurality of convex portions. The method includes preparing the graphene layer on the substrate, and forming the plurality of convex portions on the graphene layer by irradiating a noble gas onto the graphene layer.

Crystalline multilayer structure and semiconductor device
11038026 · 2021-06-15 · ·

Provided is a crystalline multilayer structure having good semiconductor properties. The crystalline multilayer structure includes a base substrate and a corundum-structured crystalline oxide semiconductor thin film disposed directly on the base substrate or with another layer therebetween. The crystalline oxide semiconductor thin film is 0.1 μm or less in a surface roughness (Ra).