Patent classifications
H01L21/02664
Thin-film semiconductors
Systems and methods disclosed and contemplated herein relate to manufacturing thin film semiconductors. Resulting thin film semiconductors are particularly suited for applications such as flexible optoelectronics and photovoltaic devices. Broadly, methods and techniques disclosed herein include high-temperature deposition techniques combined with lift-off in aqueous environments. These methods and techniques can be utilized to incorporate thin film semiconductors into substrates that have limited temperature tolerances.
HYDROGEN-PASSIVATED TOPOLOGICAL MATERIALS, DEVICES, AND METHODS
A topological material includes a lattice crystalline structure; and a material defect in the lattice crystalline structure that is treatable by hydrogen passivation that chemically mitigates an electronic charge associated with the material defect. The lattice crystalline structure includes dangling bonds in an atomic arrangement of the material defect of the lattice crystalline structure, and the hydrogen passivation may apply hydrogen to chemically passivate the dangling bonds of the material defect. The hydrogen passivation may be achieved by diffusing hydrogen into common materials of the lattice crystalline structure. The hydrogen passivation may chemically and/or electrostatically neutralize an electronic activity associated with the material defect.
METHOD OF MANUFACTURING A SILICON CARBIDE EPITAXIAL SUBSTRATE
A method of manufacturing a silicon carbide epitaxial substrate includes: preparing a silicon carbide single-crystal substrate having a polytype of 4H and having a principal surface inclined at an angle θ from a {0001} plane in a <11-20> direction; growing a silicon carbide epitaxial layer on the principal surface having a basal plane dislocation, the basal plane dislocation having a portion extending in a <1-100> direction and a portion extending in a <11-20> direction; and irradiating the silicon carbide epitaxial layer with an ultraviolet light having a predetermined power and a predetermined wavelength for a predetermined period of time to stabilize the basal plane dislocation. After the irradiating, the basal plane dislocation does not move even when the basal plane dislocation is irradiated with an ultraviolet light having a power of 270 mW and a wavelength of 313 nm for 10 seconds.
Assembling of molecules on a 2D material and an electronic device
The present invention relates to a method for assembling molecules on the surface of a two-dimensional material formed on a substrate, the method comprises: forming a spacer layer comprising at least one of an electrically insulating compound or a semiconductor compound on the surface of the two-dimensional material, depositing molecules on the spacer layer, annealing the substrate with spacer layer and the molecules at an elevated temperature for an annealing time duration, wherein the temperature and annealing time are such that at least a portion of the molecules are allowed to diffuse through the spacer layer towards the surface of the two-dimensional material to assemble on the surface of the two-dimensional material. The invention also relates to an electronic device.
NITRIDE SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR ELEMENT, AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE
A nitride semiconductor substrate (11, 21) includes: a substrate (2); and an AlN-containing film (100, 200) provided above the substrate (2). A thickness of the AlN-containing film (100, 200) is at most 10000 nm, and a threading dislocation density of the AlN-containing film (100, 200) is at most 2×10.sup.8 cm.sup.−2.
SEMICONDUCTOR CHIP MANUFACTURING METHOD
A substrate made of doped single-crystal silicon has an upper surface. A doped single-crystal silicon layer is formed by epitaxy on top of and in contact with the upper surface of the substrate. Either before or after forming the doped single-crystal silicon layer, and before any other thermal treatment step at a temperature in the range from 600° C. to 900° C., a denuding thermal treatment is applied to the substrate for several hours. This denuding thermal treatment is at a temperature higher than or equal to 1,000° C.
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.
Silicon film forming method and substrate processing apparatus
There is provided a method of forming a silicon film, which includes: a film forming step of forming the silicon film on a base, the silicon film having a film thickness thicker than a desired film thickness; and an etching step of reducing the film thickness of the silicon film by supplying an etching gas containing bromine or iodine to the silicon film.
SiC epitaxial wafer and method for producing SiC epitaxial wafer
A SiC epitaxial wafer according to an embodiment includes: a SiC substrate; and a SiC epitaxial layer formed on a first surface of the SiC substrate. The in-plane uniformity of a density of Z.sub.1/2 centers of the SiC epitaxial layer is 5% or less.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
Disclosed are a semiconductor device and a manufacturing method therefor. The semiconductor device includes a semiconductor substrate, an epitaxial layer grown on a side of the semiconductor substrate; a quantum dot transport layer disposed on the epitaxial layer; and a gate oxide layer disposed on the quantum dot transport layer. With this arrangement, the semiconductor device provided by the present disclosure may reduce a threshold voltage while ensuring gate electrode reliability.