A method for manufacturing a semiconductor structure includes: providing a base; forming multiple discrete first mask layers on the base; forming multiple sidewall layers, in which each sidewall layer is configured to encircle one of the first mask layers, and each sidewall layer is connected to closest sidewall layers, the side walls, away from the first mask layers, of multiple connected sidewall layers define initial first vias and each of the initial first vias is provided with chamfers; removing the first mask layers, and each sidewall layer defines a second via; after removing the first mask layers, forming repair layers which are located on the side walls, away from the second vias, of the sidewall layers and fill the chamfers of the initial first vias to form first vias; and etching the base along the first vias and the second vias to form capacitor holes on the base.

The present disclosure, in some embodiments, relates to a method of performing an etch process. The method is performed by forming a first plurality of openings defined by first sidewalls of a mask disposed over a substrate. A cut layer is between two of the first plurality of openings. A spacer is formed onto the first sidewalls of the mask and a second plurality of openings are formed. The second plurality of openings are defined by second sidewalls of the mask and are separated by the spacer. The substrate is etched according to the mask and the spacer.

A method of depositing a material on one of two, but not both, sidewalls of a raised structure formed on a substrate includes tilting a normal of the substrate away from a source of the deposition material or tilting the source of the deposition material away from the normal of the substrate. The method may be implemented by a plasma-enhanced chemical vapor deposition (PECVD) technique.

A method of processing a substrate includes: providing structures on a surface of a substrate; depositing a self-assembled monolayer (SAM) over the structures and the substrate, the SAM being reactive to a predetermined wavelength of radiation; determining a first pattern of radiation exposure, the first pattern of radiation exposure having a spatially variable radiation intensity across the surface of the substrate and the structures; exposing the SAM to radiation according to the first pattern of radiation exposure, the SAM being configured to react with the radiation; developing the SAM with a predetermined removal fluid to remove portions of the SAM that are not protected from the predetermined fluid; and depositing a spacer material on the substrate and the structures, the spacer material being deposited at varying thicknesses based on an amount of the SAM remaining on the surface of the substrate and the structures.

A method of manufacturing a semiconductor device, including: providing a substrate including a first cell and a second cell, the first cell and the second cell are arranged in a first direction; forming a plurality of first metal strips arranged in a second direction and extending in the first direction on a first plane; forming a first trench over a boundary between the first cell and the second cell, a bottom surface of the first trench is located on a second plane over the first plane; filling the first trench with a non-conductive material, resulting in a separating wall extending in the first direction; and fort plurality of second metal strips extending in the second direction on a third plane over the second plane and including a first second metal strip and a second second metal strip separated by the separating wall.

In one exemplary aspect, the present disclosure is directed to a method for lithography patterning. The method includes providing a substrate and forming a target layer over the substrate. A patterning layer is formed by depositing a first layer having an organic composition; depositing a second layer including over 50 atomic percent of silicon; and depositing a photosensitive layer on the second layer. In some implementations, the second layer is deposited by ALD, CVD, or PVD processes.

A pick-up structure for a memory device and method for manufacturing memory device are provided. The pick-up structure includes a substrate and a plurality of pick-up electrode strips. The substrate has a memory cell region and a peripheral pick-up region adjacent thereto. The pick-up electrode strips are parallel to a first direction and arranged on the substrate in a second direction. The second direction is different from the first direction. Each pick-up electrode strip includes a main part in the peripheral pick-up region and an extension part extending from the main part to the memory cell region. The main part is defined by fork-shaped patterns of a first mask layer. The extension part has a width less than that of the main part, and the extension part has a side wall surface aligned with a side wall surface of the main part.

Embodiments of the present disclosure generally relate to methods, apparatus, and systems for maintaining film modulus within a predetermined modulus range. In one implementation, a method of processing substrates includes introducing one or more processing gases to a processing volume of a processing chamber, and depositing a film on a substrate supported on a substrate support disposed in the processing volume. The method includes supplying simultaneously a first radiofrequency (RF) power and a second RF power to one or more bias electrodes of the substrate support. The first RF power includes a first RF frequency and the second RF power includes a second RF frequency that is less than the first RF frequency. A modulus of the film is maintained within a predetermined modulus range.

Techniques described herein relate to methods, apparatus, and systems for promoting adhesion between a substrate and a metal-containing photoresist. For instance, the method may include receiving the substrate in a reaction chamber, the substrate having a first material exposed on its surface, the first material including a silicon-based material and/or a carbon-based material; generating a plasma from a plasma generation gas source that is substantially free of silicon, where the plasma includes chemical functional groups; exposing the substrate to the plasma to modify the surface of the substrate by forming bonds between the first material and chemical functional groups from the plasma; and depositing the metal-containing photoresist on the modified surface of the substrate, where the bonds between the first material and the chemical functional groups promote adhesion between the substrate and the metal-containing photoresist.

A semiconductor structure is provided. The semiconductor structure includes a substrate, a target layer on the substrate, and a hard mask layer doped with a group IV-A element on the target layer. The number of sp3 orbital bonds in the hard mask layer is greater than the number of sp2 orbital bonds.