A method of fabricating a semiconductor integrated circuit (IC) is disclosed. A dielectric layer is formed over a substrate. An interlayer is formed over the dielectric layer. A first photoresist layer with a first opening is formed over the interlayer and a second photoresist layer having a second opening is formed over the first photoresist layer. Spacers are formed along sidewalls of the first opening and the second opening. A first trench is formed in the interlayer by using the spacer along the first opening as an etch mask. A second trench is formed in the interlayer by using the spacer along the second opening as an etch mask. The first trench and the second trench are extended down into the dielectric layer as a lower portion and an upper portion, respectively, of a dielectric trench.

The present invention is a material for forming an organic film, containing: (A) a compound for forming an organic film shown by the following general formula (1A); and (B) an organic solvent, where Wi represents a tetravalent or hexavalent organic group, n1 represents an integer of 1 or 2, n2 represents 2 or 3, each R.sub.1 independently represents any in the following formula (1B), and a hydrogen atom of a benzene ring in the formula (1A) is optionally substituted with a fluorine atom. This provides: a compound having a dioxin structure, which is cured even under film formation conditions in inert gas, and which is capable of forming an organic underlayer film having not only excellent heat resistance and properties of filling and planarizing a pattern formed on a substrate, but also favorable film formability and adhesiveness to a substrate; and an organic film material containing the compound.

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A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.

Provided is a method of manufacturing a semiconductor device. The method of manufacturing a semiconductor device includes forming a target etching layer on a substrate, patterning the target etching layer to form a pattern layer including a pattern portion having a first height and a first width and a recess portion having a second width, providing a first gas and a second gas on the pattern layer, and performing a reaction process including reacting the first and second gases with a surface of the pattern portion by irradiating a laser beam on the pattern layer. The performing the reaction process includes removing a portion of sidewalls of the pattern portion so that the pattern portion has a third width that is smaller than the first width.

A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.

A semiconductor arrangement includes: a substrate; fins formed on the substrate and extending in a first direction; gate stacks formed on the substrate and each extending in a second direction crossing the first direction to intersect at least one of the fins, and dummy gates composed of a dielectric and extending in the second direction; spacers formed on sidewalls of the gate stacks and the dummy gates; and dielectric disposed between first and second ones of the gate stacks in the second direction to electrically isolate the first and second gate stacks. The dielectric is disposed in a space surrounded by respective spacers of the first and second gate stacks which extend integrally. At least a portion of an interval between the first and second gate stacks in the second direction is less than a line interval achievable by lithography in a process of manufacturing the semiconductor arrangement.

In a method of forming a pattern, a lower coating layer and a photoresist layer are sequentially formed on an object layer. An exposure process may be performed such that the photoresist layer is divided into an exposed portion and a non-exposed portion. A portion of the lower coating layer overlapping or contacting the exposed portion is at least partially transformed into a polarity conversion portion that has a polarity substantially identical to that of the exposed portion. The non-exposed portion of the photoresist layer is selectively removed.

A semiconductor structure includes a first fin, a second fin, a first gate, a second gate, at least one spacer, and an insulating structure. The first gate is present on the first fin. The second gate is present on the second fin. The spacer is present on at least one side wall of at least one of the first gate and the second gate. The insulating structure is present between the first fin and the second fin, in which the spacer is substantially absent between the insulating structure and said at least one of the first gate and the second gate.

Disclosed is a method for manufacturing a semiconductor device. The method includes: a first pattern forming step of forming, on a pattern forming target film, a first film that is patterned to have a first pattern that includes lines which are aligned with each other with spaces of a predetermined interval being interposed therebetween, and include a portion separated by using a first cut mask; a step of forming a second film to cover a surface of the first film; and a second pattern forming step of forming a pattern forming target film that is patterned to have a second pattern, by separating a portion of the space of the first step using a second cut mask. The first and second cut mask includes a plurality of openings or light shielding portions that have equal shapes, respectively.

A method includes forming a mask layer over a target layer. A merge cut feature is formed in the mask layer. A first mandrel layer is formed over the mask layer and the merge cut feature. The first mandrel layer is patterned to form first openings therein. First spacers are formed on sidewalls of the first openings. The first openings are filled with a dielectric material to form plugs. The first mandrel layer is patterned to remove portions of the first mandrel layer interposed between adjacent first spacers. The merge cut feature is patterned using the first spacers and the plugs as a combined mask. The plugs are removed. The mask layer is patterned using the first spacers as a mask. The target layer is patterned, using the mask layer and the merge cut feature as a combined mask, to form second openings therein.