A semiconductor device according to an embodiment includes a first-conductivity-type SiC substrate, a first-conductivity-type SiC layer provided on the SiC substrate, having a first surface, and having a lower first-conductivity-type impurity concentration than the SiC substrate, first second-conductivity-type SiC regions provided in the first surface of the SiC layer, second second-conductivity-type SiC regions provided in the first SiC regions and having a higher second-conductivity-type impurity concentration than the first SiC region, silicide layers provided on the second SiC regions and having a second surface, a difference between a distance from the SiC substrate to the second surface and a distance from the SiC substrate to the first surface being equal to or less than 0.2 μm, a first electrode provided to contact with the SiC layer and the silicide layers, and a second electrode provided to contact with the SiC substrate.

A drift layer is made of silicon carbide and has a first conductivity type. At least one trench has a first side surface facing a Schottky barrier diode region, and a second side surface extending in a transistor region and contacting a source region, a body region, and the drift layer. A first protective region is provided under the at least one trench, has a second conductivity type, and is higher in impurity concentration of the second conductivity type than the body region. A second protective region extends from the first protective region, reaches at least one of the first side surface and an end region of the second side surface continuous with the first side surface, has an uppermost portion shallower than a lowermost portion of the body region, and is higher in impurity concentration of the second conductivity type than the body region.

A layer I vanadium-doped PIN-type nuclear battery, including from top to bottom a radioisotope source layer(1), a p-type ohm contact electrode(4), a SiO.sub.2 passivation layer(2), a SiO.sub.2 compact insulation layer(3), a p-type SiC epitaxial layer(5), an n-type SiC epitaxial layer(6), an n-type SiC substrate(7) and an n-type ohm contact electrode(8). The doping density of the p-type SiC epitaxial layer(5) is 1×10.sup.19 to 5×10.sup.19 cm.sup.−3, the doping density of the n-type SiC substrate(7) is 1×10.sup.18 to 7×10.sup.18 cm.sup.−3. The n-type SiC epitaxial layer(6) is a low-doped layer I formed by injecting vanadium ions, with the doping density thereof being 1×10.sup.13 to 5×10.sup.14 cm.sup.−3. Also provided is a preparation method for a layer I vanadium-doped PIN-type nuclear battery. The present invention solves the problem that the doping density of layer I of the exiting SiC PIN-type nuclear battery is high.

An object of the present invention is to provide a silicon carbide semiconductor device with which the electric field at the time of switching is relaxed and the element withstand voltage can be enhanced. The distance between the outer peripheral end of a second surface electrode and the inner peripheral end of a field insulation film is smaller than the distance between an outer peripheral end of the second surface electrode and an inner peripheral end of the field insulation film in the case where the electric field strength applied to the outer peripheral lower end of the second surface electrode is calculated so as to become equal to the smallest dielectric breakdown strength among the dielectric breakdown strength of the field insulation film and the dielectric breakdown strength of the surface protective film at the time of switching when the value of dV/dt is greater than or equal to 10 kV/μs.

A method for manufacturing a wide bandgap junction harrier Schottky diode (1) having an anode side (10) and a cathode side (15) is provided, wherein an (n±) doped cathode layer (2) is arranged on the cathode side (15), at least one p doped anode layer (3) is arranged on the anode side (10), an (n−) doped drift layer (4) is arranged between the cathode layer (2) and the at least one anode layer (3), which drift layer (4) extends to the anode side (10), wherein the following manufacturing steps are performed: a) providing an (n+) doped wide bandgap substrate(100), b) creating the drift layer (4) on the cathode layer (2), c) creating the at least one anode layer (3) on the drift layer (4), d) applying a first metal layer (5) on the anode side (10) on top of the drift layer (4) for forming a Schottky contact (55), characterized in, that e) creating a second metal layer (6) on top of at least one anode layer (3), wherein after having created the first and the second metal layer (5, 6), a metal layer on top of the at least one anode layer (3) has a second thickness (64) and a metal layer on top of the drift layer (4) has a first thickness (54), wherein the second thickness (64) is smaller than the first thickness (54), 1) then performing a first heating step (63) at a first temperature, by which due the second thickness (64) being smaller than the first thickness (54) an ohmic contact (65) is formed at the interface between the second metal layer (6) and the at least one anode layer (3), wherein performing the first healing step (63) such that a temperature below the first metal layer (5) is kept below a temperature for forming an ohmic contact.

Process (A) of preparing a silicon carbide substrate of a first conductivity type; process (B) of forming an epitaxial layer of the first conductivity type on one principal surface of the silicon carbide substrate; process (C) of forming on another principal surface of the silicon carbide substrate, a first metal layer; process (D) of heat treating the silicon carbide substrate after the process (C) to form an ohmic junction between the first metal layer and the other principal surface of the silicon carbide substrate, and a layer of a substance (10) highly cohesive with another metal on the first metal layer; and a process (E) of removing impurities and cleaning a surface of the first metal layer (8) on the other principal surface of the silicon carbide substrate (D), are performed. The heat treatment at process (D) is executed at a temperature of 1,100 degrees C. or more.

An SBD of a JBS structure has on a front side of a semiconductor substrate, nickel silicide films in ohmic contact with p-type regions and a FLR, and a titanium film forming a Schottky junction with an n.sup.−-type drift region. A thickness of each of the nickel silicide films is in a range from 300 nm to 700 nm. The nickel silicide films each has a first portion protruding from the front surface of the semiconductor substrate in a direction away from the front surface of the semiconductor substrate, and a second portion protruding in the semiconductor substrate from the front surface of the semiconductor substrate in a depth direction. A thickness of the first portion is equal to a thickness of the second portion. A width of the second portion is wider than a width of the first portion.

A semiconductor device includes: a SiC substrate; a device structure in or on the SiC substrate and subject to an electric field during operation of the semiconductor device; a current-conduction region of a first conductivity type in the SiC substrate adjoining the device structure; and a shielding region of a second conductivity type laterally adjacent to the current-conduction region and configured to at least partly shield the device structure from the electric field. The shielding region has a higher net doping concentration than the current-conduction region, and has a length (L) measured from a first position which corresponds to a bottom of the device structure to a second position which corresponds to a bottom of the shielding region. The current-conduction region has a width (d) measured between opposing lateral sides of the current-conduction region, and L/d is in a range of 1 to 10.

A wide gap semiconductor device has a wide gap semiconductor layer 10; and a metal electrode 20 disposed on the wide gap semiconductor layer 10. The metal electrode 20 has a monocrystalline layer 21 having a hexagonal close-packed (HCP) structure in an interface region between the metal electrode 20 and the wide gap semiconductor layer 10. The monocrystalline layer 21 has a specific element-containing region 22 containing O, S, P or Se.

A method for fabricating a junction barrier Schottky diode device is disclosed. The junction barrier Schottky device includes an N-type semiconductor layer, a plurality of first P-type doped areas, a plurality of second P-type doped areas, and a conductive metal layer. The first P-type doped areas and the second P-type doped are formed in the N-type semiconductor layer. The second P-type doped areas are self-alignedly formed above the first P-type doped areas. The spacing between every neighboring two of the second P-type doped areas is larger than the spacing between every neighboring two of the first P-type doped areas. The conductive metal layer, formed on the N-type semiconductor layer, covers the first P-type doped areas and the second P-type doped areas.