H01L21/2003

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR EVALUATING SEMICONDUCTOR DEVICE

A method for manufacturing a semiconductor device, including forming a Fin structure on a semiconductor silicon substrate, performing ion implantation into the Fin structure, and subsequently performing recovery heat treatment on the semiconductor silicon substrate to recrystallize silicon of the Fin structure, wherein the Fin structure is processed so as not to have an end face of a {111} plane of the semiconductor silicon onto a sidewall of the Fin structure to be formed. It also includes a method for manufacturing a semiconductor device that is capable of preventing a defect from being introduced into a Fin structure when the Fin structure is subjected to ion implantation and recovery heat treatment.

SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE

On a front surface of an n.sup.+-type starting substrate containing silicon carbide, a pin diode is configured having silicon carbide layers constituting an n.sup.+-type buffer layer, an n.sup.-type drift layer, and a p.sup.+-type anode layer sequentially formed by epitaxial growth. The n.sup.+-type buffer layer is formed by so-called co-doping of nitrogen and vanadium, which forms a recombination center, together with an n-type impurity. The n.sup.+-type buffer layer includes a first part disposed at a side of a second interface of the buffer layer with the substrate and a second part disposed at side of a first interface of the buffer layer with the drift layer. The vanadium concentration in the second part is lower than that in the first part. The vanadium concentration in the second part is at most one tenth of the maximum value Vmax of the vanadium concentration in the n.sup.+-type buffer layer.

LASER IRRADIATION APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

A laser irradiation apparatus (1) according to an embodiment includes an optical-system module (20) configured to apply laser light (L1) to an object to be irradiated, a shield plate (51) in which a slit (54) is formed, through which the laser light (L1) passes, and a reflected-light receiving component (61) disposed between the optical-system module (20) and the shield plate (51), in which the reflected-light receiving component (61) is able to receive, out of the laser light (L1), reflected light (R1) reflected by the shield plate (51).

Semiconductor Device
20190051743 · 2019-02-14 · ·

A semiconductor device includes a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed thereon. The semiconductor device also includes a body layer extending a first predetermined distance into the semiconductor layer of the second conductivity type and a pair of trenches extending a second predetermined distance into the semiconductor layer of the second conductivity type. Each of the pair of trenches consists essentially of a dielectric material disposed therein and a concentration of doping impurities present in the semiconductor layer of the second conductivity type and a distance between the pair of trenches define an electrical characteristic of the semiconductor device. The semiconductor device further includes a control gate coupled to the semiconductor layer of the second conductivity type and a source region coupled to the semiconductor layer of the second conductivity type.

Semiconductor device and method for manufacturing same

A semiconductor device includes: a substrate having a cell region with a semiconductor element and an outer peripheral region; and a drift layer on the substrate. The semiconductor element includes a base region, a source region, a trench gate structure, a deep layer deeper than a gate trench, a source electrode, and a drain electrode. The outer peripheral region has a recess portion in which the drift layer are exposed, and a guard ring layer. The guard ring layer includes multiple guard ring trenches having a frame shape, surrounding the cell region and arranged on an exposed surface of the drift layer, and a first guard ring in the guard ring trenches. Each of the linear deep trenches has a width equal to a width of each of the linear guard ring trenches.

SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY

A sense amplifier (SA) comprises a semiconductor substrate having an oxide definition (OD) region, a pair of SA sensing devices, a SA enabling device, and a sense amplifier enabling signal (SAE) line for carrying an SAE signal. The pair of SA sensing devices have the same poly gate length Lg as the SA enabling device, and they all share the same OD region. When enabled, the SAE signal turns on the SA enabling device to discharge one of the pair of SA sensing devices for data read from the sense amplifier.

Sense amplifier layout for FinFET technology

A sense amplifier (SA) comprises a semiconductor substrate having an oxide definition (OD) region, a pair of SA sensing devices, a SA enabling device, and a sense amplifier enabling signal (SAE) line for carrying an SAE signal. The pair of SA sensing devices have the same poly gate length Lg as the SA enabling device, and they all share the same OD region. When enabled, the SAE signal turns on the SA enabling device to discharge one of the pair of SA sensing devices for data read from the sense amplifier.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

A semiconductor device includes: a substrate having a cell region with a semiconductor element and an outer peripheral region; and a drift layer on the substrate. The semiconductor element includes a base region, a source region, a trench gate structure, a deep layer deeper than a gate trench, a source electrode, and a drain electrode. The outer peripheral region has a recess portion in which the drift layer are exposed, and a guard ring layer. The guard ring layer includes multiple guard ring trenches having a frame shape, surrounding the cell region and arranged on an exposed surface of the drift layer, and a first guard ring in the guard ring trenches. Each of the linear deep trenches has a width equal to a width of each of the linear guard ring trenches.

SILICON CHANNEL FOR BONDED 3D NAND DEVICES

A method for manufacturing a memory device includes depositing a seed layer in a memory hole extending through a memory stack. The seed layer includes particles, such as silicon particles. The seed layer is etched to produce etched particles. The etched particles act as nuclei for the growth of a crystalline channel material in the memory hole.

A MIRROR PLATE FOR A FABRY-PEROT INTERFEROMETER AND A FABRY-PEROT INTERFEROMETER

A method for producing a mirror plate for a Fabry-Perot interferometer includes providing a substrate, which includes silicon, implementing a semi-transparent reflective coating on the substrate, forming a passivated region in and/or on the substrate by etching a plurality of voids in the substrate, and by passivating the surfaces of the voids, forming a first sensor electrode on top of the passivated region, and forming a second sensor electrode supported by the substrate.