An SiC epitaxial wafer having an SiC epitaxial layer formed on an SiC single crystal substrate having an offset angle of 4 degrees or less in a <11-20> direction from a (0001) plane. A trapezoidal defect included in the SiC epitaxial wafer includes an inverted trapezoidal defect in which a length of a lower base on a downstream side of a step flow is equal to or less than a length of an upper base on an upstream side of the step flow. Also disclosed is a method for manufacturing the SiC epitaxial wafer.

A semiconductor device includes a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed thereon. The semiconductor device also includes a body layer extending a first predetermined distance into the semiconductor layer of the second conductivity type and a pair of trenches extending a second predetermined distance into the semiconductor layer of the second conductivity type. Each of the pair of trenches consists essentially of a dielectric material disposed therein and a concentration of doping impurities present in the semiconductor layer of the second conductivity type and a distance between the pair of trenches define an electrical characteristic of the semiconductor device. The semiconductor device further includes a control gate coupled to the semiconductor layer of the second conductivity type and a source region coupled to the semiconductor layer of the second conductivity type.

A sense amplifier (SA) comprises a semiconductor substrate having an oxide definition (OD) region, a pair of SA sensing devices, a SA enabling device, and a sense amplifier enabling signal (SAE) line for carrying an SAE signal. The pair of SA sensing devices have the same poly gate length Lg as the SA enabling device, and they all share the same OD region. When enabled, the SAE signal turns on the SA enabling device to discharge one of the pair of SA sensing devices for data read from the sense amplifier.