A semiconductor device may be provided, including a base layer, an insulating layer arranged over the base layer, a memory structure arranged at least partially within the insulating layer, where the memory structure may include a first electrode, a second electrode, and an intermediate element between the first electrode and the second electrode, and a resistor arranged at least partially within the insulating layer, where the resistor may be arranged in substantially a same horizontal plane with one of the first electrode and the second electrode.

A semiconductor device may be provided, including a base layer, an insulating layer arranged over the base layer, a memory structure arranged at least partially within the insulating layer, where the memory structure may include a first electrode, a second electrode, and an intermediate element between the first electrode and the second electrode, and a resistor arranged at least partially within the insulating layer, where the resistor may be arranged in substantially a same horizontal plane with one of the first electrode and the second electrode.

A device includes isolation regions extending into a semiconductor substrate, with a substrate strip between opposite portions of the isolation regions having a first width. A source/drain region has a portion overlapping the substrate strip, wherein an upper portion of the source/drain region has a second width greater than the first width. The upper portion of the source/drain region has substantially vertical sidewalls. A source/drain silicide region has inner sidewalls contacting the vertical sidewalls of the source/drain region.

A device includes isolation regions extending into a semiconductor substrate, with a substrate strip between opposite portions of the isolation regions having a first width. A source/drain region has a portion overlapping the substrate strip, wherein an upper portion of the source/drain region has a second width greater than the first width. The upper portion of the source/drain region has substantially vertical sidewalls. A source/drain silicide region has inner sidewalls contacting the vertical sidewalls of the source/drain region.

A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a semiconductor fin, forming a source/drain structure on the semiconductor fin, forming an interfacial layer on the semiconductor fin, treating the interfacial layer with fluorine, forming a ferroelectric gate dielectric layer on the interfacial layer, treating the ferroelectric gate dielectric layer with fluorine, and forming a gate electrode layer on the ferroelectric gate dielectric layer.

A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.

A semiconductor device manufacturing method includes burying a void formed in a substrate with a polymer having a urea bond; forming an oxide film on the substrate; and desorbing a depolymerized polymer obtained by depolymerizing the polymer from the void through the oxide film.

A semiconductor device manufacturing method includes burying a void formed in a substrate with a polymer having a urea bond; forming an oxide film on the substrate; and desorbing a depolymerized polymer obtained by depolymerizing the polymer from the void through the oxide film.

A semiconductor device includes a semiconductor part, first and second electrodes. The semiconductor part is provided between the first and second electrodes. A method of manufacturing the device includes forming the first electrode covering a back surface of a wafer after the second electrode is formed on a front surface of the wafer; forming a first groove by selectively removing the first electrode; and dividing the wafer by forming a second groove at the front surface side. The wafer includes a region to be the semiconductor part; and the first and second grooves are provided along a periphery of the region. The first groove is in communication with the first groove. The second groove has a width in a direction along the front surface of the wafer, the width of the first groove being narrower than a width of the first groove in the same direction.

A semiconductor device includes a semiconductor part, first and second electrodes. The semiconductor part is provided between the first and second electrodes. A method of manufacturing the device includes forming the first electrode covering a back surface of a wafer after the second electrode is formed on a front surface of the wafer; forming a first groove by selectively removing the first electrode; and dividing the wafer by forming a second groove at the front surface side. The wafer includes a region to be the semiconductor part; and the first and second grooves are provided along a periphery of the region. The first groove is in communication with the first groove. The second groove has a width in a direction along the front surface of the wafer, the width of the first groove being narrower than a width of the first groove in the same direction.