According to some embodiments, a method for stabilizing electrical properties of a diamond semiconductor comprises terminating a surface of a diamond with hydrogen (H) or deuterium (D) atoms and over-coating the surface of the diamond with an encapsulating material comprising metal oxide salt doped with one or more elements capable of generating negative charge in the metal oxide salt.

Systems and methods for thermal treatment of a workpiece are provided. In one example, a method for conducting a treatment process on a workpiece, such as a thermal treatment process, an annealing treatment process, an oxidizing treatment process, or a reducing treatment process in a processing apparatus is provided. The processing apparatus includes a plasma chamber and a processing chamber. The plasma chamber and the processing chamber are separated by a plurality of separation grids or grid plates. The separation grids or grid plates operable to filter ions generated in the plasma chamber. The processing chamber has a workpiece support operable to support a workpiece.

Surface treatment processes for treating a workpiece with organic radicals are provided. In one example implementation, a method for processing a workpiece having a semiconductor material and a carbon containing layer (e.g., photoresist) can include a surface treatment process on the workpiece. The surface treatment process can include generating one or more species in a first chamber (e.g., a plasma chamber). The surface treatment process can include mixing one or more hydrocarbon radicals with the species to create a mixture. The surface treatment process can include exposing the carbon containing layer to the mixture in a second chamber (e.g., a processing chamber).

Processes for surface treatment of a workpiece are provided. In one example implementation, a method can include performing an organic radical based surface treatment process on a workpiece. The organic radical based surface treatment process can include generating one or more species in a first chamber. The surface treatment process can include mixing one or more hydrocarbon molecules with the species to create a mixture. The mixture can include one or more organic radicals. The surface treatment process can include exposing a semiconductor material on the workpiece to the mixture in a second chamber.

Embodiments of the present invention are directed to techniques for providing an novel field effect transistor (FET) architecture that includes a center fin region and one or more vertically stacked nanosheets. In a non-limiting embodiment of the invention, a non-planar channel region is formed having a first semiconductor layer, a second semiconductor layer, and a fin-shaped bridge layer between the first semiconductor layer and the second semiconductor layer. Forming the non-planar channel region can include forming a nanosheet stack over a substrate, forming a trench by removing a portion of the nanosheet stack, and forming a third semiconductor layer in the trench. Outer surfaces of the first semiconductor layer, the second semiconductor layer, and the fin-shaped bridge region define an effective channel width of the non-planar channel region.

A display device manufacturing method and a display device manufacturing apparatus are provided. The method includes steps A to D. The step A includes forming a display device. The step B includes disposing the display device in a sealing chamber. The step C includes adding hydrogen gas into the sealing chamber such that hydrogen atoms in the hydrogen gas spread in an insulating layer. The step D includes heating the hydrogen gas and/or the display device in sealing chamber such that the hydrogen atoms in insulating layer spread in the semiconductor member. The present invention can enhance electrical performance of the semiconductor member.

A method according to some embodiments of the present disclosure includes providing a workpiece that include an opening and a top surface, depositing a dielectric material over the workpiece and into the opening to form a first dielectric layer that has a top portion over the top surface and a plug portion in the opening, treating the first dielectric layer to convert top portion into a second dielectric layer different from the first dielectric layer, and selectively removing the second dielectric layer.

Films are modified to include deuterium in an inductive high density plasma chamber. Chamber hardware designs enable tunability of the deuterium concentration uniformity in the film across a substrate. Manufacturing of solid state electronic devices include integrated process flows to modify a film that is substantially free of hydrogen and deuterium to include deuterium.

The present invention provides a method for forming a semiconductor structure. The method including: Firstly, a substrate is provided, a first region and a second region are defined thereon, next, a gate dielectric layer and a work function metal layer are sequentially formed on the substrate within the first region and within the second region. Afterwards, a dielectric layer is formed on the work function metal layer within the second region, a hydrogen gas treatment is then performed on the substrate, and the work function metal layer is removed within the first region.

There is provided a semiconductor device comprising: a semiconductor substrate; an emitter region of a first conductivity type provided inside the semiconductor substrate; a base region of a second conductivity type provided below the emitter region inside the semiconductor substrate; an accumulation region of the first conductivity type provided below the base region inside the semiconductor substrate, and containing hydrogen as an impurity; and a trench portion provided to pass through the emitter region, the base region and the accumulation region from an upper surface of the semiconductor substrate.