Described herein is a FinFET device in which epitaxial layers of semiconductor material are formed in source/drain regions on fin portions. The fin portions can be located within a dielectric layer that is deposited on a semiconductor substrate. Surfaces of the fin portions can be oriented in the {100} lattice plane of the crystalline material of the fin portions, providing for good epitaxial growth. Further described are methods for forming the FinFET device.

There is provided a semiconductor device comprising: a semiconductor substrate; an emitter region of a first conductivity type provided inside the semiconductor substrate; a base region of a second conductivity type provided below the emitter region inside the semiconductor substrate; an accumulation region of the first conductivity type provided below the base region inside the semiconductor substrate, and containing hydrogen as an impurity; and a trench portion provided to pass through the emitter region, the base region and the accumulation region from an upper surface of the semiconductor substrate.

A semiconductor device includes a semiconductor substrate, an insulating film provided on the semiconductor substrate, a first element disposed at least in a lower layer portion of the insulating film, a second element disposed at least in the lower layer portion of the insulating film, and a hydrogen barrier member provided on the semiconductor substrate. The hydrogen barrier member is made from a material transmitting hydrogen less easily than does a material of the insulating film. The hydrogen barrier member and the semiconductor substrate surround the second element. The hydrogen barrier member does not surround the first element.

An example of forming semiconductor devices can include forming a silicon-hydrogen (SiH) terminated surface on a silicon structure that includes patterned features by exposing the silicon structure to a hydrogen fluoride (HF) containing solution and performing a surface modification via hydrosilylation by exposing the SiH terminated surface to an alkene and/or an alkyne.

A semiconductor device includes a gate electrode extending in a first direction on a substrate, a first active pattern extending in a second direction intersecting the first direction on the substrate to penetrate the gate electrode, the first active pattern including germanium, an epitaxial pattern on a side wall of the gate electrode, a first semiconductor oxide layer between the first active pattern and the gate electrode, and including a first semiconductor material, and a second semiconductor oxide layer between the gate electrode and the epitaxial pattern, and including a second semiconductor material. A concentration of germanium of the first semiconductor material may be less than a concentration of germanium of the first active pattern, and the concentration of germanium of the first semiconductor material may be different from a concentration of germanium of the second semiconductor material.

Described herein is a technique capable of heating a substrate uniformly by electromagnetic waves. According to one aspect of the technique, there is provided a substrate processing apparatus including: a process chamber where a substrate is processed; a heating device configured to heat the substrate by electromagnetic waves; a gas supply mechanism including a hydrogen-containing gas supply system configured to supply a hydrogen-containing gas into the process chamber; a plasma generator configured to excite the hydrogen-containing gas by plasma; and a controller configured to control the heating device, the gas supply mechanism and the plasma generator to modify the substrate by performing: (a) adding hydrogen atom to a surface of the substrate by supplying the hydrogen-containing gas excited by the plasma generator onto the substrate; and (b) intermittently supplying the electromagnetic waves to heat the substrate after performing (a).

Surface treatment processes for treating low-k dielectric materials are provided. One example implementation can include a method for processing a workpiece. The workpiece can include a silicon and carbon containing film material. The method can include treating the workpiece with a surface treatment process. The surface treatment process can include generating one or more species in a first chamber; mixing one or more hydrocarbon molecules with the species to create a mixture comprising one or more organic radicals; and exposing the silicon and carbon containing layer on the workpiece to the mixture in a second chamber.

The present application discloses a semiconductor device and a method for forming a p-type conductive channel in a diamond using an abrupt heterojunction, which pertain to the technical field of fabrication of semiconductor devices. The method includes: forming a diamond layer on a substrate; forming one or multiple layers of a heterogeneous elementary substance or compound having an acceptor characteristic on an upper surface of the diamond layer; forming a heterojunction at an interface between the diamond layer and an acceptor layer; forming two-dimensional hole gas at one side of the diamond layer with a distance of 10 nm-20 nm away from the heterojunction; and using the two-dimensional hole gas as a p-type conductive channel. The method enables a concentration and a mobility of carriers to maintain stable at a temperature range of 0 C.-1000 C., thereby realizing normal operation of the diamond device at high temperature environment.

A method includes forming a first high-k dielectric layer over a first semiconductor region, forming a second high-k dielectric layer over a second semiconductor region, forming a first metal layer comprising a first portion over the first high-k dielectric layer and a second portion over the second high-k dielectric layer, forming an etching mask over the second portion of the first metal layer, and etching the first portion of the first metal layer. The etching mask protects the second portion of the first metal layer. The etching mask is ashed using meta stable plasma. A second metal layer is then formed over the first high-k dielectric layer.

Hydrogen annealing for heating a semiconductor wafer on which a thin film containing a dopant is deposited to an annealing temperature under an atmosphere containing hydrogen is performed. A native oxide film is inevitably formed between the thin film containing the dopant and the semiconductor wafer, however, by performing hydrogen annealing, the dopant atoms diffuse relatively easily in the native oxide film and accumulate at the interface between the front surface of the semiconductor wafer and the native oxide film. Subsequently, the semiconductor wafer is preheated to a preheating temperature under a nitrogen atmosphere, and then, flash heating treatment in which the front surface of the semiconductor wafer is heated to a peak temperature for less than one second is performed. The dopant atoms are diffused and activated in a shallow manner from the front surface of the semiconductor wafer, thus, the low-resistance and extremely shallow junction is obtained.