An embodiment of a sensor device includes a base substrate, a circuit pattern formed overlying the interior surface of the substrate, a physiological characteristic sensor element on the exterior surface of the substrate, conductive plug elements located in vias formed through the substrate, each conductive plug element having one end coupled to a sensor electrode, and having another end coupled to the circuit pattern, a multilayer component stack carried on the substrate and connected to the circuit pattern, the stack including features and components to provide processing and wireless communication functionality for sensor data obtained in association with operation of the sensor device, and an enclosure structure coupled to the substrate to enclose the interior surface of the substrate, the circuit pattern, and the stack.

A semiconductor device includes: an insulated circuit substrate; a power semiconductor element mounted on the insulated circuit substrate; a first terminal having a plate-like shape having a first main surface and electrically connected to the power semiconductor element; a second terminal having a second main surface opposed to the first main surface of the first terminal and electrically connected to the power semiconductor element; an insulating sheet interposed between the first main surface and the second main surface; and a conductive film provided on at least one of the first main surface side and the second main surface side of the insulating sheet.

A semiconductor package includes a substrate, a first semiconductor device disposed over the substrate in an offset position toward an edge of the substrate, and a ring structure disposed over the substrate and surrounding the first semiconductor device. The ring structure includes an overhang portion cantilevered over the edge of the substrate.

A semiconductor device includes a semiconductor chip, an insulated circuit substrate including an insulating board and a circuit pattern on the insulating board electrically connected to the semiconductor chip, and a wiring member having a leg portion bonded to the circuit pattern. The leg portion includes a vertical portion, a first divided portion, and a second divided portion. The vertical portion extends in a vertical direction orthogonal to a plane of the circuit pattern, and has a split end provided at a side of the vertical portion at which the circuit pattern is disposed. The first divided portion extends from the split end in a first direction parallel to the plane of the circuit pattern and is bonded to the circuit pattern. The second divided portion extends from the split end in a second direction opposite the first direction and is bonded to the circuit pattern.

A package structure is provided. The package structure includes a first package component and a second package component. The second package component includes a substrate and an electronic component disposed on the substrate, and the first package component is mounted to the substrate. The package structure further includes a ring structure disposed on the second package component and around the first package component. The ring structure has a first foot and a second foot, the first foot and the second foot extend toward the substrate, the electronic component is covered by the ring structure and located between the first foot and the second foot, and the first package component is exposed from the ring structure.

A compound metal lid for semiconductor chip package is provided. The compound metal lid includes a first cover and a second cover. The first cover has a first frame body, a plurality of riveting holes, and an upper opening. The riveting holes penetrate through the first frame body and are distributed symmetrically on the first frame body. The upper opening is formed at an inner part of the first frame body, and the riveting holes surround the upper opening. The second cover has a second frame body, a plurality of riveting protrusions, and a lower opening. The riveting protrusions are formed on the upper surface of the second frame body. The lower opening penetrates through the second frame body. The first cover is disposed on an upper surface of the second cover, and the riveting protrusions are correspondingly riveted in the riveting holes.

A semiconductor device includes a substrate, an electronic component, a cover and a liquid metal. The electronic component is disposed on the substrate. The cover is disposed on the substrate and covers the electronic component. The liquid metal is formed between the cover and the electronic component.

A compound closed-type metal lid for a semiconductor chip package is provided. The compound closed-type metal lid includes a cover plate, and a frame bottom board. The cover plate has a frame body, and a plurality of riveting holes. The riveting holes penetrate through the frame body and are distributed symmetrically on the frame body. The frame bottom board has a frame body, a plurality of riveting protrusions, and an opening. The riveting protrusions are distributed on an upper surface of the frame body. The cover plate is disposed on an upper surface of the frame bottom board. The riveting protrusions are correspondingly riveted in the riveting holes.

A sealing structure including: a set of base members forming a sealed space; a through-hole which is formed in at least one of the base members, and communicates with the sealed space; and a sealing member that seals the through-hole. An underlying metal film including a bulk-like metal such as gold is provided on a surface of the base member provided with the through-hole. The sealing member seals the through-hole while being bonded to the underlying metal film, and includes: a sealing material which is bonded to the underlying metal film, and includes a compressed product of a metal powder of gold or the like, the metal powder having a purity of 99.9% by mass or more; and a lid-like metal film which is bonded to the sealing material, and includes a bulk-like metal such as gold. Further, the sealing material includes: an outer periphery-side densified region being in contact with an underlying metal film; and a center-side porous region being in contact with the through-hole. The densified region has a porosity of 10% or less in terms of an area ratio at any cross-section.

A semiconductor apparatus includes: an insulating substrate including a circuit pattern; a semiconductor device mounted on the insulating substrate and electrically connected to the circuit pattern; a case storing the insulating substrate and the semiconductor device; and an electrode attached to the case, wherein a tip surface of the electrode is jointed to the circuit pattern with solder, the electrode is brought into contact with and pushed against the circuit pattern by the case, and a projection is provided on the tip surface.