Patent classifications
H01L21/4817
Electronic module and method for producing an electronic module
One aspect of the invention relates to an electronic module comprising a module housing and an electrically conductive connection element. The connection element has a first portion and a second portion, and also a shaft between the first portion and the second portion. The connection element, which is provided with a non-metallic coating in the region of the shaft, is injected together with the coating in the region of the shaft into the module housing, such that the connection element is fixed in the module housing.
Proximity coupling interconnect packaging systems and methods
Proximity coupling interconnect packaging systems and methods. A semiconductor package assembly comprises a substrate, a first semiconductor die disposed adjacent the substrate, and a second semiconductor die stacked over the first semiconductor die. There is at least one proximity coupling interconnect between the first semiconductor die and the second semiconductor die, the proximity coupling interconnect comprising a first conductive pad on the first coupling face on the first semiconductor die and a second conductive pad on a second coupling face of the second semiconductor die, the second conductive pad spaced apart from the first conductive pad by a gap distance and aligned with the first conductive pad. An electrical connector is positioned laterally apart from the proximity coupling interconnect and extends between the second semiconductor die and the substrate, the position of the electrical connector defining the alignment of the first conductive pad and the second conductive pad.
SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING THE SAME
Provided are a semiconductor module capable of easily connecting extraction pin with a wiring board and having reliable connections, and a method for manufacturing the same. A semiconductor module includes: a multilayer board having a semiconductor device mounted thereon, the multilayer board electrically connecting to the semiconductor device; an extraction pin electrically connecting to one of the semiconductor device and the multilayer board; and a wiring board bonded to the extraction pin for electrical connection. The extraction pin has a press-fit. The wiring board has a hole portion bonded with the press-fit of the extraction pin. The base materials of the press-fit of the extraction pin and the hole portion of the wiring board are copper (Cu). A bonded portion between the base materials of press-fit and the corresponding hole portion of the wiring board includes a CuSnNi alloy layer.
FORMATION METHOD OF CHIP PACKAGE
A method for forming a chip package is provided. The method includes forming a plurality of conductive structures over a carrier substrate. The method also includes disposing a semiconductor die over the carrier substrate such that the conductive ti structures surround the semiconductor die. The method further includes disposing a shielding element over the semiconductor die and the conductive structures. The shielding element is electrically connected to the conductive structures.
Radar component package and method for manufacturing the same
The present invention relates to a millimeter wave radar component package, comprising: a box cover, having a metal layer arranged on inner surface of the box cover, the metal layer facing a channel of a box body, wherein a cavity is formed between the box cover and the box body; and the box body, comprising: a first insulator, connected with the box cover, wherein in the first insulator a channel is opened, and one end of the channel corresponds with the position of antenna and the other end is connected with the cavity; one or more chips, arranged on a second insulator in a flip manner and covered by the first insulator; the second insulator, arranged between the first insulator and a third insulator; the third insulator; and the antenna and conductive lines, arranged in the third insulator and connected with pads of the one or more chips through the second insulator, wherein the conductive lines are exposed from the third insulator for electrical contact. The present invention further relates to a method for manufacturing the package.
Case with a plurality of pair case components for a semiconductor device
An object is to provide a technology for enabling reduction in the time and cost taken to manufacture a die to be used for molding a case that surrounds semiconductor elements. A semiconductor device includes a base plate, a cooling plate, an insulating substrate, a semiconductor element, a case, a lead frame formed integrally with the case and including a terminal formed on one end portion of the lead frame and protruding outward, and a sealant. The case includes a pair of first case components arranged to face each other, and a pair of second case components arranged to face each other and crossing the pair of first case components. Joining end portions of the first case components to end portions of the pair of second case components forms the case.
CERAMIC SEMICONDUCTOR DEVICE PACKAGE
A described example includes: a ceramic package having a board side surface and an opposite top side surface; a heat slug mounted to the board side surface of the ceramic package, forming a bottom surface in a die cavity; leads mounted to conductive lands on the ceramic package; sidewall metallization extending from the conductive lands and covering a portion of one of the sides of the ceramic package; copper tungsten alloy conductor layers formed in the ceramic package and spaced by dielectric layers; bond fingers formed of a conductor layer and extending to the die cavity; a semiconductor device mounted over the heat slug, and having bond pads on a device side surface facing away from a surface of the heat slug; electrical connections between bond pads on the semiconductor device and the bond fingers; and a lid mounted to the top side surface of the ceramic package.
Electronic device packages with internal moisture barriers
A method of packaging a radio frequency (RF) transistor device includes attaching one or more electronic devices to a carrier substrate, applying an encapsulant over at least one of the one or more electronic devices, and providing a protective structure on the carrier substrate over the one or more electronic devices. A packaged RF transistor device includes a carrier substrate, one or more electronic devices attached to the carrier substrate, an encapsulant material over at least one of the one or more electronic devices and extending onto the carrier substrate, and a protective structure on the carrier substrate over the one or more electronic devices and the encapsulant material.
PACKAGED RF POWER DEVICE WITH PCB ROUTING
A radio frequency (RF) transistor amplifier includes a package submount. a package frame comprising an electrically insulating member and one or more conductive layers on the package submount and exposing a surface thereof, a transistor die on the surface of the package submount and comprising respective terminals that are electrically connected to the package frame, a protective member covering the transistor die, and one or more electrical components that are attached to the package frame outside the protective member. Related RF power device packages and fabrication methods are also discussed.
SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR APPARATUS
A semiconductor apparatus includes: an insulating substrate including a circuit pattern; a semiconductor device mounted on the insulating substrate and electrically connected to the circuit pattern; a case storing the insulating substrate and the semiconductor device; and an electrode attached to the case, wherein a tip surface of the electrode is jointed to the circuit pattern with solder, the electrode is brought into contact with and pushed against the circuit pattern by the case, and a projection is provided on the tip surface.