There is provided an integrated RF subsystem including a chip substrate, a circuit patterned on a first surface of the chip substrate, a probe electrically integrated with the circuit on a first side of the chip substrate, a frame at a second side of the chip substrate defining a first cavity underneath the circuit.

To address technical problems facing silicon transient thermal management, a thermal interface material (TIM) may be used to provide improved thermal conduction. The TIM may include a liquid metal (LM) TIM, which may provide a significant reduction in thermal resistance, such as a thermal resistance R.sub.TIM≈0.01-0.025° C.-cm2/W. The LM TIM may be applied using a presoaked applicator, such as an open-cell polyurethane foam applicator that has been presoaked in a controlled amount of LM TIM. This LM presoaked applicator is then used to apply the LM TIM to one or more target thermal surfaces, thereby providing thermal and mechanical coupling between the LM TIM and the thermal surface. The resulting thermal surface and thermally conductive LM TIM may be used to improve thermal conduction for various silicon-based devices, including various high-power, high-performance system-on-chip (SoC) packages, such as may be used in portable consumer products.

Semiconductor devices and methods of manufacture which utilize lids in order to constrain thermal expansion during annealing are presented. In some embodiments lids are placed and attached on encapsulant and, in some embodiments, over first semiconductor dies. As such, when heat is applied, and the encapsulant attempts to expand, the lid will work to constrain the expansion, reducing the amount of stress that would otherwise accumulate within the encapsulant.

A novel heat sinking technology, uniquely adaptive to LED lighting devices in a generally LED array format containing multiple openings on said heat sink's base portions and optionally fin portions providing “short path cooling” technology. The “short path cooling” technology is thoroughly taught with multiple examples. Also taught, are methods of heat sink area maintenance when said openings are placed on said heat sinks. Indeed, even surface area increases are shown to be possible when multiple openings are placed on said heat sinks. Lastly, other non-LED semiconductor cooling is discussed and illustrated in various figures using said “short path cooling” technology.

Implementations of semiconductor packages may include a metallic baseplate, a first insulative layer coupled to the metallic baseplate, a first plurality of metallic traces, each metallic trace of the first plurality of metallic traces coupled to the electrically insulative, one or more semiconductor devices coupled to each one of the first plurality of metallic traces, a second plurality of metallic traces coupled to the one or more semiconductor devices, and a second insulative layer coupled to the metallic traces of the second plurality of metallic traces.

A method for manufacturing a power module substrate includes a first lamination step of laminating a ceramic substrate and a copper sheet through an active metal material and a filler metal having a melting point of 660° C. or lower on one surface side of the ceramic substrate; a second lamination step of laminating the ceramic substrate and an aluminum sheet through a bonding material on the other surface side of the ceramic substrate; and a heating treatment step of heating the ceramic substrate, the copper sheet, and the aluminum sheet laminated together, and the ceramic substrate and the copper sheet, and the ceramic sheet and the aluminum sheet are bonded at the same time.

A semiconductor device includes a circuit substrate, a semiconductor package, and a package frame. The semiconductor package is disposed on the circuit substrate. The package frame is disposed over the circuit substrate. The package frame encircles the semiconductor package. The semiconductor package has a first surface facing the circuit substrate and a second surface opposite to the first surface. The package frame leaves exposed at least a portion of the second surface of the semiconductor package. The package frame forms a cavity, which cavity encircles the semiconductor package.

A terminal case formed by integrally molding a lead frame and a case that has internally an inner face on which the lead frame is mounted and has externally a step portion fixed to a circuit block having an insulating substrate and semiconductor chips formed on the insulating substrate. An opening portion is formed between the step portion and the inner face so as to extend through them, and the opening portion is filled with an adhesive to bond the insulating substrate to the step portion. Since a connecting area to which a bonding wire of the lead frame is ultrasonically bonded is fixed, it is possible to reduce the bonding failures of the lead frames.

An anisotropic thermal interface device including plural aligned thermally anisotropic conductive composite layers. Each layer has a first thermal conductivity in a first direction and a second, larger thermal conductivity in a second direction. The aligned thermally anisotropic conductive composite layers extend substantially parallel to each other in the first direction and include 45-95 weight percent graphite flakes aligned in the second direction. The thermally anisotropic conductive composite layers have a binder including a branched siloxane. The thermally anisotropic conductive composite layers are adhered to adjacent thermally anisotropic conductive composite. The thermally anisotropic conductive composite layers have a second thermal conductivity of 25 to 45 W/mK. The anisotropic thermal interface device has an arithmetic average surface roughness of 5 to 20 μm and a tensile strength of 50 to 130 KPa.

An electronic assembly that includes a substrate having an upper surface and a bridge that includes an upper surface. The bridge is within a cavity in the upper surface of the substrate. A first electronic component is attached to the upper surface of the bridge and the upper surface of the substrate and a second electronic component is attached to the upper surface of the bridge and the upper surface of the substrate, wherein the bridge electrically connects the first electronic component to the second electronic component.