A tunable amorphous silicon layer for use with multilayer patterning stacks can be used to maximize transparency and minimize reflections so as to improve overlay metrology contrast. By increasing the hydrogen content in the amorphous silicon layer, the extinction coefficient (k) value and the refractive index (n) value can be decreased to desired values. Methods for improving overlay metrology contrast with the tunable amorphous silicon layer are disclosed.

A semiconductor device having an EMI shield layer and/or EMI shielding wires, and a manufacturing method thereof, are provided. In an example embodiment, the semiconductor device includes a semiconductor die, an EMI shield layer shielding the semiconductor die, and an encapsulating portion encapsulating the EMI shield layer. In another example embodiment, the semiconductor device further includes EMI shielding wires extending from the EMI shield layer and shielding the semiconductor die.

A strip made of a semiconductor material is formed over a substrate. Longitudinal portions of the strip having a same length are covered with sacrificial gates made of an insulating material and spaced apart from each other. Non-covered portions of the strip are doped to form source/drain regions. An insulating layer followed by a layer of a temporary material is then deposited. Certain ones of the sacrificial gates are left in place. Certain other ones of the sacrificial gates are replaced by a metal gate structure. The temporary material is then replaced with a conductive material to form contacts to the source/drain regions.

A semiconductor device is provided. The semiconductor device includes a carrier, an electronic component, an adapter, a first metal wire and a second metal wire. The electronic component is disposed on the carrier. The adapter is disposed on the carrier. The first metal wire connects the electronic component and the adapter. The second metal wire connects the adapter and the carrier.

A first and second antenna substrate are included in an advanced antenna package. Each antenna substrate includes a respective array of antenna elements disposed on a respective first surface of the substrate. A plurality of stand-off balls disposed between the first surfaces of first and second antenna substrates are bonded to the first surface of the first antenna substrate. A first sub-plurality of the stand-off balls are placed at positions in a peripheral region of the first and second antenna substrates. A second sub-plurality of the stand-off balls are placed at interior positions between antenna elements of the first and second antenna substrates. A plurality of adhesive pillars are disposed between and bond the first surfaces of first and second antenna substrates at a plurality of discrete selected locations. A first location of the discrete selected locations is in a peripheral region. A second location of the discrete selected locations is at an interior position between antenna elements. A method for fabricating the antenna package is also described.

Provided is a wiring structure for display device which does not generate hillocks even when exposed to high temperatures at levels around 450 to 600 C., has excellent high-temperature heat resistance, keeps electrical resistance (wiring resistance) of the entire wiring structure low, and further has excellent resistance to hydrofluoric acid. This wiring structure for a display device comprises a structure in which are laminated, in order from the substrate side, a first layer of an Al alloy that contains at least one chemical element selected from the group (group X) consisting of Ta, Nb, Re, Zr, W, Mo, V, Hf, Ti, Cr, and Pt and contains at least one rare earth element, and a second layer of an Al alloy nitride, or a nitride of at least one chemical element selected from the group Y consisted of Ti, Mo, Al, Ta, Nb, Re, Zr, W, V, Hf, and Cr.

A first and second antenna substrate are included in an advanced antenna package. Each antenna substrate includes a respective array of antenna elements disposed on a respective first surface of the substrate. A plurality of stand-off balls disposed between the first surfaces of first and second antenna substrates are bonded to the first surface of the first antenna substrate. A first sub-plurality of the stand-off balls are placed at positions in a peripheral region of the first and second antenna substrates. A second sub-plurality of the stand-off balls are placed at interior positions between antenna elements of the first and second antenna substrates. A plurality of adhesive pillars are disposed between and bond the first surfaces of first and second antenna substrates at a plurality of discrete selected locations. A first location of the discrete selected locations is in a peripheral region. A second location of the discrete selected locations is at an interior position between antenna elements.

An embodiment of the present invention provides a method and system of manufacturing a redistribution platform comprising: providing a substrate; patterning a first layer of a routing trace over the substrate; semi-curing a first translucent material around the first layer of the routing trace; testing the first layer of the routing trace; patterning a second layer of the routing trace over the first translucent material; and fully curing the first translucent material subsequent to the patterning of the second layer of the routing trace.

An embodiment of the present invention provides a method and system of manufacturing a redistribution platform comprising: providing a substrate; patterning a first layer of a routing trace over the substrate where the first layer of the routing trace includes a conductive material forming part of a circuit element; semi-curing a first translucent or transparent material around the first layer of the routing trace; testing the first layer of the routing trace; patterning a second layer of the routing trace over the first translucent or transparent material where the second layer of the routing trace includes a further conductive material which is the same as the conductive material forming part of the circuit element and attached to the conductive material of the first layer of the routing trace; and fully curing the first translucent or transparent material subsequent to the patterning of the second layer of the routing trace.

A tunable amorphous silicon layer for use with multilayer patterning stacks can be used to maximize transparency and minimize reflections so as to improve overlay metrology contrast. By increasing the hydrogen content in the amorphous silicon layer, the extinction coefficient (k) value and the refractive index (n) value can be decreased to desired values. Methods for improving overlay metrology contrast with the tunable amorphous silicon layer are disclosed.