A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.

A method of manufacturing a light-emitting device includes a hole forming process for forming a through-hole that continues from a front surface to a back surface of a mounting substrate, a pattern forming process for continuously forming a circuit pattern on an inner surface of the through-hole in the mounting substrate, from an end portion of the through-hole on the front surface of the mounting substrate to a mounting portion of a light-emitting element, and on a periphery of the through-hole on the back surface of the mounting substrate, a mounting process for mounting the light-emitting element on the mounting portion, and a hot pressing process in that an inorganic material softened by heating is placed on the surface of the mounting substrate and is advanced into the through-hole while sealing the light-emitting element by pressing and bonding the inorganic material to the surface of the mounting substrate.

A pressing unit including a pressing pin is attached to a mold, a semiconductor chip, first and second heat sinks, and solders are disposed in a cavity of the mold, a mold closing state is made, and a reflow is carried out in a state where the first and second heat sinks are pressed against first and second wall surfaces by the pressing pin to form a laminated body. After the laminated body is formed, the pressing pin is pulled out from the cavity, and a resin molded body is formed by injecting a resin.

Embodiments of a thermal compression bonding process bond head and a method for producing a thermal compression bonding process bond head are disclosed. In some embodiments, the bond head includes a thermal compression bonding process heater and a cooling block coupled to the heater through an annular structure. The annular structure surrounds a lower portion of the cooling block and couples the cooling block to the heater such that there is no direct mechanical contact between the cooling block and the heater.

Embodiments of a thermal compression bonding process bond head and a method for producing a thermal compression bonding process bond head are disclosed. In some embodiments, the bond head includes a thermal compression bonding process heater and a cooling block coupled to the heater through an annular structure. The annular structure surrounds a lower portion of the cooling block and couples the cooling block to the heater such that there is no direct mechanical contact between the cooling block and the heater.

A semiconductor package can include a semiconductor die stack including a top die and one or more core dies below the top die. The semiconductor package can further include a metal heat sink plated on a top surface of the top die and have a plurality of side surfaces coplanar with corresponding ones of a plurality of sidewalls of the semiconductor die stack. A molding can surround the stack of semiconductor dies and the metal heat sink, the molding including a top surface coplanar with an exposed upper surface of the metal heat sink. The top surface of the molding and the exposed upper surface of the metal heat sink are both mechanically altered. For example, the metal heat sink and the molding can be simultaneously ground with a grinding disc and can show grinding marks as a result.

A semiconductor package can include a semiconductor die stack including a top die and one or more core dies below the top die. The semiconductor package can further include a metal heat sink plated on a top surface of the top die and have a plurality of side surfaces coplanar with corresponding ones of a plurality of sidewalls of the semiconductor die stack. A molding can surround the stack of semiconductor dies and the metal heat sink, the molding including a top surface coplanar with an exposed upper surface of the metal heat sink. The top surface of the molding and the exposed upper surface of the metal heat sink are both mechanically altered. For example, the metal heat sink and the molding can be simultaneously ground with a grinding disc and can show grinding marks as a result.

The inventive concept relates to an apparatus for manufacturing a semiconductor package and a method of manufacturing a semiconductor package. According to embodiments, the method of manufacturing a semiconductor package may include preparing a substrate including upper conductive pads on an upper surface of the substrate, preparing a first semiconductor chip including first solder balls, wherein a first dielectric layer covering sidewalls of the first solder balls is on a lower surface of the first semiconductor chip, disposing the first semiconductor chip on the substrate such that the first solder balls are on the upper conductive pads, and bonding the first solder balls to the upper conductive pads by applying an alternating current electric field to the first dielectric layer.

The inventive concept relates to an apparatus for manufacturing a semiconductor package and a method of manufacturing a semiconductor package. According to embodiments, the method of manufacturing a semiconductor package may include preparing a substrate including upper conductive pads on an upper surface of the substrate, preparing a first semiconductor chip including first solder balls, wherein a first dielectric layer covering sidewalls of the first solder balls is on a lower surface of the first semiconductor chip, disposing the first semiconductor chip on the substrate such that the first solder balls are on the upper conductive pads, and bonding the first solder balls to the upper conductive pads by applying an alternating current electric field to the first dielectric layer.

The present invention belongs to the technical field of high-performance metal materials and advanced electronic interconnection electroplating, and provides a twin crystal copper material which has preferred orientation of a (110) crystal plane, and includes twin crystal lamellas which are mainly distributed at an included angle of 45 degrees with a crystal grain growth direction; and a proportion of crystal grains with the twin crystal lamellas in total crystal grains of the twin crystal copper material is more than or equal to 50%, and/or a ratio of a volume of the twin crystal structure to a total volume of the twin crystal copper material is more than or equal to 50%. The twin crystal copper material provided by the present invention has more excellent structure thermal stability, and the twin crystal copper material shows the unique property that the proportion of the twin crystal lamellas does not decrease but increases.