In one embodiment, a method of manufacturing a semiconductor device includes forming a first semiconductor layer including impurity atoms with a first density, on a first substrate, forming a second semiconductor layer including impurity atoms with a second density higher than the first density, on the first semiconductor layer, and forming a porous layer resulting from porosification of at least a portion of the second semiconductor layer. The method further includes forming a first film including a device, on the porous layer, providing a second substrate provided with a second film including a device, and bonding the first and second substrates to sandwich the first and second films. The method further includes separating the first and second substrates from each other such that a first portion of the porous layer remains on the first substrate and a second portion of the porous layer remains on the second substrate.

The present disclosure describes a method that includes forming a first two-dimensional (2D) layer on a first substrate and attaching a second 2D layer to a carrier film. The method also includes bonding the second 2D layer to the first 2D layer to form a heterostack including the first and second 2D layers. The method further includes separating the first 2D layer of the heterostack from the first substrate and attaching the heterostack to a second substrate. The method further includes removing the carrier film from the second 2D layer.

A chip bonding system (1) includes a dicing device (20) to, by dicing a dicing substrate stuck on a sheet (1E), generate a plurality of chips (CP) stuck on the sheet (1E) with chips (CP) adjacent to each other joined to each other via remaining uncut portions, an activation treatment device (60) to activate bonding surfaces of respective ones of the chips (CP) stuck to the sheet (TE), a sheet stretching device (40) to, by stretching the sheet (TE) on which the chips (CP) having bonding surfaces activated by the activation treatment device (60) are stuck, brings the chips (CP) into a state of being separated from one another, and a bonding device (30) to, by bringing one chip (CP) picked out of the chips (CP) separated from one another into contact with a substrate (WT), bond the one chip (CP) to the substrate (WT).

A glass substrate contains, as a glass matrix composition as represented by mole percentage based on oxides, SiO.sub.2: 58-75%, Al.sub.2O.sub.3: 4.5-16%, B.sub.2O.sub.3: 0-6%, MgO: 0-6%, CaO: 0-6%, SrO: 5-20%, BaO: 5-20%, and MgO+CaO+SrO+BaO: 15-40%. The glass substrate has an alkali metal oxide content of 0-0.1% as represented by mole percentage based on oxides. The glass substrate has an average coefficient of thermal expansion α of 56-90 (×10.sup.−7/° C.) at 50° C.-350° C.

A method for transferring a superficial layer from a detachable structure comprises the following steps: a) supplying the detachable structure comprising: •a support substrate, •a detachable layer arranged on the support substrate along a main plane and comprising a plurality of walls that are separated from one another, each wall having at least one side that is perpendicular to the main plane; •a superficial layer arranged on the detachable layer along the main plane; b) applying a mechanical force configured to cause said walls to bend, along a direction that is secant to said side, until causing the mechanical rupture of the walls, in order to detach the superficial layer from the support substrate.

A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.

A glass substrate contains, as a glass matrix composition as represented by mole percentage based on oxides, SiO.sub.2: 58-75%, Al.sub.2O.sub.3: 4.5-16%, B.sub.2O.sub.3: 0-6%, MgO: 0-6%, CaO: 0-6%, SrO: 5-20%, BaO: 5-20%, and MgO+CaO+SrO+BaO:15-40%. The glass substrate has an alkali metal oxide content of 0-0.1% as represented by mole percentage based on oxides. The glass substrate has an average coefficient of thermal expansion α of 56-90 (×10.sup.−7/° C.) at 50° C.-350° C.

A method for manufacturing a gallium nitride semiconductor device includes: preparing a gallium nitride wafer; forming an epitaxial growth film on the gallium nitride wafer to provide a processed wafer having chip formation regions; perform a surface side process on a one surface side of the processed wafer; removing the gallium nitride wafer and dividing the processed wafer into a chip formation wafer and a recycle wafer; and forming an other surface side element component on an other surface side of the chip formation wafer.

The present disclosure provides a laser lift-off method for separating substrate and semiconductor-epitaxial structure, which includes: providing at least one semiconductor device, wherein the semiconductor device includes a substrate and at least one semiconductor-epitaxial structure disposed in a stack-up manner; irradiating a laser onto an edge area of the semiconductor device to separate portions of the substrate and the semiconductor-epitaxial structure in the edge area; and pressing against the edge area of the semiconductor device vis a pressing device, then irradiating the laser onto an inner area of the semiconductor device to separate portions of the substrate and the semiconductor-epitaxial structure in the inner area wherein gas is generated during separating the portions of the substrate and the semiconductor-epitaxial structure in the inner area and evacuated from the edge area, to prevent damage of the semiconductor-epitaxial structure during the separating process.

A method includes forming an etch stop material layer and a planar sacrificial spacer layer over a front surface of a first substrate, forming an insulating encapsulation layer over the planar sacrificial spacer layer and on a backside surface and a side surface of the first substrate, forming a continuous structure including first semiconductor devices over a top surface of the insulating encapsulation layer, etching inter-die trenches within the continuous structure to divide the continuous structure, bonding the divided continuous structure to second semiconductor devices located over a second substrate, selectively removing the planar sacrificial spacer layer by performing a wet etch process in which an isotropic etchant is introduced into the inter-die trenches, and detaching the first substrate from an assembly of the second substrate, the second semiconductor devices, and the divided continuous structure after the removing the planar sacrificial spacer layer.