A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.

Implementations of a silicon-on-insulator (SOI) die may include a silicon layer including a first side and a second side, and an insulative layer coupled directly to the second side of the silicon layer. The insulative layer may not be coupled to any other silicon layer.

A method for making semiconductor devices includes: attaching a substrate with a plurality of electronic components onto a composite tape having an adhesive layer which is sensitive to ultraviolet (UV) irradiation and a UV-transparent base film, wherein the substrate is attached onto the adhesive layer of the composite tape; placing the substrate and the composite tape on a UV-transparent carrier, wherein the UV-transparent carrier is in contact with the UV-transparent base film of the composite tape; singulating the substrate into a plurality of semiconductor devices each having one of the plurality of electronic components; depositing a shielding material on the plurality of semiconductor devices to form a shielding layer on each of the plurality of semiconductor devices; irradiating a UV light to the composite tape through the UV-transparent carrier to reduce adhesivity of the adhesive layer; and detaching the plurality of semiconductor devices from the UV-transparent carrier.

A method for making semiconductor devices includes: attaching a substrate with a plurality of electronic components onto a composite tape having an adhesive layer which is sensitive to ultraviolet (UV) irradiation and a UV-transparent base film, wherein the substrate is attached onto the adhesive layer of the composite tape; placing the substrate and the composite tape on a UV-transparent carrier, wherein the UV-transparent carrier is in contact with the UV-transparent base film of the composite tape; singulating the substrate into a plurality of semiconductor devices each having one of the plurality of electronic components; depositing a shielding material on the plurality of semiconductor devices to form a shielding layer on each of the plurality of semiconductor devices; irradiating a UV light to the composite tape through the UV-transparent carrier to reduce adhesivity of the adhesive layer; and detaching the plurality of semiconductor devices from the UV-transparent carrier.

There is provided a solid-state imaging device including: a first substrate including a first semiconductor substrate and a first wiring layer, the first semiconductor substrate having a pixel unit with pixels; a second substrate including a second semiconductor substrate and a second wiring layer, the second semiconductor substrate having a circuit with a predetermined function; and a third substrate including a third semiconductor substrate and a third wiring layer, the third semiconductor substrate having a circuit with a predetermined function, the first, second, and third substrates being stacked in this order, the first substrate and the second substrate being bonded together with the first wiring layer and the second wiring layer opposed to each other, a first coupling structure on bonding surfaces of the first substrate and the second substrate, and including an electrode junction structure with electrodes formed on the respective bonding surfaces in direct contact with each other.

A method of manufacturing a display device comprises: forming a thin film transistor array on a substrate, wherein the substrate has a via which enable two opposite sides of the substrate to be communicated with each other; and filling the via with a conductive filler after the thin film transistor array is formed, so that the conductive filler is electrically connected with the thin film transistor array.

Cables, cable connectors, and support structures for cantilever package and/or cable attachment may be fabricated using additive processes, such as a coldspray technique, for integrated circuit assemblies. In one embodiment, cable connectors may be additively fabricated directly on an electronic substrate. In another embodiment, seam lines of cables and/or between cables and cable connectors may be additively fused. In a further embodiment, integrated circuit assembly attachment and/or cable attachment support structures may be additively formed on an integrated circuit assembly.

According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a first insulating portion, a second electrode, a gate electrode, a second insulating portion, and a third electrode. The second electrode is provided inside the first insulating portion, and includes a portion opposing the first semiconductor region in the second direction. The gate electrode is provided inside the first insulating portion and opposes the second semiconductor region with a gate insulating layer interposed in the second direction. The second insulating portion is linked to the first insulating portion. The third electrode is electrically connected to the second semiconductor region, and the third semiconductor region.