A package structure includes at least one semiconductor die, a plurality of hollow cylinders, an insulating encapsulant, a redistribution layer and through holes. The plurality of hollow cylinders is surrounding the at least one semiconductor die. The insulating encapsulant has a top surface and a bottom surface opposite to the top surface, wherein the insulating encapsulant encapsulates the at least one semiconductor die and the plurality of hollow cylinders. The redistribution layer is disposed on the top surface of the insulant encapsulant and over the at least one semiconductor die. The through holes are penetrating through the plurality of hollow cylinders.

A microprocessor heat sink fastener, comprising a nut comprising a thermoplastic material and fibrous fill particles and a bore extending along an axis of the nut. The bore has internal threads. The internal threads comprise a surface. At least one of the fibrous fill particles has first and second ends extending from the surface into a sub-surface region.

A power semiconductor module includes a substrate, having power semiconductor components, further including a housing element, and having a DC voltage connection device having a flat lead connection device and a second flat lead connection element, wherein the flat lead connection device has a first flat lead connection element encased by a plastic element of the flat lead connection device and materially bonded to the plastic element, wherein a connection section of the first flat lead connection element projects from the plastic element, a connection section of the second flat lead connection element is arranged on the plastic element or is at least partly enclosed by the plastic element and bonded to the plastic element so that a section of the plastic element is between the first flat lead connection element and the connection section of the second flat lead connection element.

A semiconductor package has central region and peripheral region surrounding central region. The semiconductor package includes dies, encapsulant, and redistribution structure. The dies include functional die and first dummy dies. Functional die is disposed in central region. First dummy dies are disposed in peripheral region. Redistribution structure is disposed on encapsulant over the dies, and is electrically connected to functional die. Vacancy ratio of central region is in the range from 1.01 to 3.00. Vacancy ratio of the peripheral region is in the range from 1.01 to 3.00. Vacancy ratio of central region is a ratio of total area of central region to total area occupied by dies disposed in central region. Vacancy ratio of peripheral region is a ratio of total area of peripheral region to total area occupied by first dummy dies disposed in peripheral region.

Provided is a power conversion device, including: a semiconductor module including a semiconductor switching element; a heat sink configured to cool the semiconductor module; a spring member configured to press the semiconductor module onto the heat sink; a casing configured to accommodate the semiconductor module and the spring member; and a bridge-like structure configured to press the semiconductor module onto the heat sink through intermediation of the spring member when the casing is mounted to the heat sink.

A microprocessor carrier comprising a lever having an elongate arm and a wedge structure extending from one end of the elongate arm, and a frame comprising and a fulcrum structure to receive the lever and a microprocessor. The fulcrum structure is to couple the lever to the frame.

A microprocessor carrier, comprising a frame comprising a metal. The first frame surrounds an aperture for receiving a microprocessor package. At least one hinge assembly is on a first frame edge, and at least one latch assembly is on a second frame edge. One or more alignment tabs coupled to the frame. The one or more alignment tabs extend orthogonally from at least one frame edge. The alignment tabs are to align the microprocessor package with a microprocessor socket. The hinge assembly and the latch assembly are to engage with a microprocessor loading mechanism coupled to a printed circuit board.

Embodiments disclosed herein include electronic packages for optical to electrical switching. In an embodiment, an electronic package comprises a first package substrate and a second package substrate attached to the first package substrate. In an embodiment, a die is attached to the second package substrate. In an embodiment, a plurality of photonics engines are attached to a first surface and a second surface of the first package substrate. In an embodiment, the plurality of photonics engines are communicatively coupled to the die through the first package substrate and the second package substrate.

A power semiconductor module including a cooling apparatus and a power semiconductor device mounted on the cooling apparatus, wherein the cooling apparatus includes: a ceiling plate that; a case; and a cooling fin, a ceiling plate and the case respectively include fastening portions that are used to fasten the ceiling plate and the case to an external apparatus, while the ceiling plate and the outer edge portion are arranged in an overlapping manner, the power semiconductor device includes a circuit substrate and a terminal case, the fastening portions protrude farther outward than a periphery of the ceiling plate, and the terminal case includes a case body arranged along a perimeter of the circuit substrate and reinforcing portions that extend to top surface sides of the fastening portions.

In one general aspect, an apparatus can include a substrate, a semiconductor die coupled with a first surface of the substrate, and a metal layer disposed on a second surface of the substrate. The second surface can be opposite the first surface. The apparatus can also include a plurality of metal fins coupled with the metal layer, and a metal ring coupled with the metal layer. The metal ring can surround the plurality of metal fins.