A multi-chip package includes multiple IC die interconnected to a package substrate. An integrated heat spreader (IHS) is located over one or more primary IC die, but is absent from over one or more secondary IC die. Thermal cross-talk between IC dies and/or thermal performance of individual IC dies may be improved by constraining the dimensions of the IHS to be over less than all IC die of the package. A first thermal interface material (TIM) may be between the IHS and the primary IC die, but absent from over the secondary IC die. A second TIM may be between a heat sink and the IHS and also between the heat sink and the secondary IC die. The heat sink may be segmented, or have a non-planarity to accommodate differences in z-height across the IC die and/or as a result of constraining the dimensions of the IHS to be over less than all IC die.

A semiconductor baseplate is disclosed. Specific implementations of a baseplate may include a planar portion including a plurality of recesses therein, the planar portion may be made of a first material, and a plurality of pegs where each peg of the plurality of pegs may be configured to fit within each recess of the plurality of recesses, the plurality of pegs may be made of a second material, where the first material and the second material may be bonded together.

A plate-shaped conductor is placed on an upper surface of a plate-shaped heat dissipation member with an insulation member interposed therebetween. A heat insulation member is placed at a location that is different from a location where the conductor is placed, on the upper surface of the heat dissipation member. An FET is electrically connected to the conductor. When current flows through the FET, the FET generates heat. A microcomputer that outputs a control signal for controlling operation of the FET is connected to an upper surface of the circuit board and is located opposite to the heat insulation member with the circuit board interposed therebetween.

Disclosed herein are integrated circuit (IC) packages with an electronic component having a patterned protective material on a face, as well as related devices and methods. In some embodiments, a computing device may include: an integrated circuit (IC) package with an electronic component having a protective material on the back face of the electronic component, where the protective material is patterned to include an area on the back face of the electronic component that is not covered by the protective material; a circuit board, where the IC package is electrically coupled to the circuit board; and a heat spreader, where the heat spreader is secured to the circuit board and in thermal contact with the area on the back face of the electronic component that is not covered by the protective material.

A module. In some embodiments, the module includes a substrate; a plurality of electronic components, secured to an upper surface of the substrate; a thermally conductive heat spreader, on the electronic components and in thermal contact with an electronic component of the plurality of electronic components; a standoff, between the substrate and the heat spreader; an alignment element, extending into the substrate; a hard stop, under the substrate; and a plurality of compressible interconnects, under the substrate, and extending through the hard stop. The electronic components may be within a sight area of the substrate. The module may be configured to transmit a compressive load from an upper surface of the standoff to a lower surface of the substrate through a load path not including any of the electronic components.

Chip packages, electronic devices and method for making the same are described herein. The chip packages and electronic devices have a heat spreader disposed over a plurality of integrated circuit (IC) devices. The heat spreader has an opening through which a protrusion from an overlaying cover extends into contact with one or more of the IC devices to provide a direct heat transfer path to the cover. Another one or more other IC devices have a heat transfer path to the cover through the heat spreader. The separate heat transfer paths allow more effective thermal management of the IC devices of the chip package.

A chip package fabricating kit includes a metal cover, at least one screw, and at least one screw cap. The metal cover includes a cap portion and at least one leg. The cap portion substantially presses against the BGA package. The leg substantially presses a PCB board that loads the BGA package. The leg forms a concave space with the metal cover for substantially encompassing the BGA package. Each the screw screws through a corresponding leg from top to bottom. Each the screw screws the PCB board at a first side. The screw cap respectively corresponds to the screw and one leg. The screw cap caps and fixes a tail of its corresponding screw for affixing the PCB board. A height of the concave space is dynamically adjusted by adjusting a degree that the screw screws with the screw cap. Such that the concave space substantially clamps the BGA package.

A multi-chip package includes multiple IC die interconnected to a package substrate. An integrated heat spreader (IHS) is located over one or more primary IC die, but is absent from over one or more secondary IC die. Thermal cross-talk between IC dies and/or thermal performance of individual IC dies may be improved by constraining the dimensions of the IHS to be over less than all IC die of the package. A first thermal interface material (TIM) may be between the IHS and the primary IC die, but absent from over the secondary IC die. A second TIM may be between a heat sink and the IHS and also between the heat sink and the secondary IC die. The heat sink may be segmented, or have a non-planarity to accommodate differences in z-height across the IC die and/or as a result of constraining the dimensions of the IHS to be over less than all IC die.

A power semiconductor module includes an insulating substrate, conductor patterns and a power semiconductor element. The conductor patterns are formed on both surfaces of the insulating substrate. The power semiconductor element is mounted on the conductor patterns. The conductor patterns include an anode terminal connection portion and a cathode terminal connection portion. A circuit is formed such that a current that flows between the anode terminal connection portion and the cathode terminal connection portion via the power semiconductor element flows on the both surfaces of the insulating substrate.

Provided are a heat dissipating structure with which stress on an electronic unit that generates heat can be reduced, and a display device comprising the same. The heat dissipating structure comprises: at least two electronic units, e.g. electronic units, that are provided on a circuit hoard, differ from one another in height from the circuit board, and generate heat; a dissipating member for dissipating heat generated from the electronic units; and heat conducting members that are sandwiched between the electronic units and the heat dissipating member so as to conduct heat, wherein the heat conducting members provided between the electronic units and the heat dissipating member have the same thickness.