A power module (PM) includes: an insulating substrate; a semiconductor device disposed on the insulating substrate, the semiconductor device including electrodes on a front surface side and a back surface side thereof; and a graphite plate having an anisotropic thermal conductivity, the graphite plate of which one end is connected to the front surface side of the semiconductor device and the other end is connected to the insulating substrate, wherein heat of the front surface side of the semiconductor device is transferred to the insulating substrate through the graphite plate. There is provide an inexpensive power module capable of reducing a stress and capable of exhibiting cooling performance not inferior to that of the double-sided cooling structures.

A method for forming a chip package is provided. The method includes forming a plurality of conductive structures over a carrier substrate. The method also includes disposing a semiconductor die over the carrier substrate such that the conductive ti structures surround the semiconductor die. The method further includes disposing a shielding element over the semiconductor die and the conductive structures. The shielding element is electrically connected to the conductive structures.

The present invention relates to a chip-on film type semiconductor package including an integrated circuit chip, a printed circuit board layer, and a graphite layer, in which the integrated circuit chip is connected to one surface of the printed circuit board layer directly or by means of a mounting element and the graphite layer is laminated on an opposite surface of the printed circuit board layer and a display device including the same.

A circuit substrate has an open substrate, a heat-dissipation block, multiple high thermal conductivity members, a first dielectric layer, a second dielectric layer, multiple first heat conductive members, and multiple second heat conductive members. The heat-dissipation block is disposed in the open substrate. Multiple high thermal conductivity members are mounted through the heat-dissipation block. The first dielectric layer exposes a part of one of two surfaces of the heat-dissipation block. The second dielectric layer exposes a part of the other surface of the heat-dissipation block. The first heat conductive members are in contact with the heat-dissipation block exposed from the first dielectric layer. The second heat conductive members are in contact with the part of the heat-dissipation block exposed from the second dielectric layer. Therefore, heat can be transferred quickly via the heat-dissipation block and the high thermal conductivity members to improve heat-dissipating capacity of the circuit substrate.

The semiconductor device includes a supporting member, a conductive member, and a semiconductor element. The supporting member has a supporting surface facing in a thickness direction. The conductive member has an obverse surface facing the same side as the supporting surface faces in the thickness direction, and a reverse surface opposite to the obverse surface. The conductive member is bonded to the supporting member such that the reverse surface faces the supporting surface. The semiconductor element is bonded to the obverse surface. The semiconductor device further includes a first metal layer and a second metal layer. The first metal layer covers at least a part of the supporting surface. The second metal layer covers the reverse surface. The first metal layer and the second layer are bonded to each other by solid phase diffusion.

An apparatus and a method of making are disclosed for an improved interposer comprises a wide bandgap semiconductor interposer such as silicon carbide (SiC) with a plurality of connectors formed in situ within the interposer for connecting the integrated circuit die to the substrate. The plurality of connectors may include carbon electrical connectors and/or optical wave guide connectors formed an angle within the interposer. The improved interposer may include a with the integrated circuit die disposed in the recess and thermally coupled to the silicon carbide (SiC) interposer for providing a heat sink for the integrated circuit die. A first and a second recess may be formed in separate surfaces of the silicon carbide (SiC) interposer enabling multiple interposers to be stacked upon one another.

Semiconductor device (A10) includes conductive substrate (20) and semiconductor element (40). The conductive substrate (20) has obverse surface (20A) facing in thickness direction (z) and reverse surface (20B) facing opposite from the obverse surface (20A). The semiconductor element (40) is electrically bonded to the obverse surface (20A). The conductive substrate (20) includes first base layer (211), second base layer (212) and metal layer (22). The first base layer (211) and second base layer (212) are made of graphite composed of stacked graphenes. The metal layer (22) is between the first base layer (211) and the second base layer (212). The graphenes of the first base layer (211) are stacked in first stacking direction perpendicular to the thickness direction (z). The graphenes of the second base layer (212) are stacked in second stacking direction perpendicular to the thickness direction (z) and crossing the first stacking direction.

Semiconductor assemblies including thermal layers and associated systems and methods are disclosed herein. In some embodiments, the semiconductor assemblies comprise one or more semiconductor devices over a substrate. The substrate includes a thermal layer configured to transfer thermal energy along a lateral plane and across the substrate. The thermal energy is transferred along a non-lateral direction from the semiconductor device to the graphene layer using one or more thermal connectors.

Semiconductor assemblies including thermal layers and associated systems and methods are disclosed herein. In some embodiments, the semiconductor assemblies comprise one or more semiconductor devices over a substrate. The substrate includes a thermal layer configured to transfer thermal energy across the substrate. The thermal energy is transferred from the semiconductor device to the graphene layer using one or more thermal connectors.

According to the embodiment, in an insulating circuit board in which a conductor part is bonded to at least one surface of an insulating substrate, in XPS analysis of the carbon amount at the surface of the conductor part, the average value of the carbon amounts at any three locations is within the range of not less than 0 at % and not more than 70 at %. In XPS analysis of the oxygen amount of the conductor part surface, it is favorable for the average value of any three locations to be within the range of not less than 3 at % and not more than 50 at %.