Patent classifications
H01L23/5254
Superconducting anti-fuse based field programmable gate array
A superconducting anti-fuse based field programmable gate array (FPGA) may include a first set of superconducting passive transmission lines, a second set of superconducting passive transmission lines, and at least one anti-fuse located at an intersection of a first superconducting passive transmission line from the first set of superconducting passive transmission lines and a second superconducting passive transmission line from the second set of superconducting passive transmission lines. A first terminal of the anti-fuse may be electrically connected to the first superconducting passive transmission line and a second terminal of the anti-fuse may be electrically connected to the second superconducting passive transmission line. The anti-fuse may transition from a first state having a non-zero resistance to a second state having a zero resistance below a critical temperature.