An imaging pixel design is provide with a photo-sensor block structure that facilitates dynamic control of well capacity in the photodiode region (i.e., a “well capacity adjustment (WCA) gate photo-sensor block”). The photodiode region includes a doped well in which photocharge is accumulated responsive to exposure to incident illumination. The capacity of the well corresponds to a well potential. WCA structures (e.g., deep trench regions) form walls at least partially surrounding and capacitively coupling with the doped well, such that biasing of the WCA structures changes the well potential and the corresponding well capacity. As such, the WCA structures can be biased during integration to increase the well potential to a high level for large well capacity, and the WCA structures can be differently biased during photocharge transfer to decrease the well potential to a sufficiently low level that avoids lag and/or other conventional concerns.

A pixel includes a photodiode and first and second transistors, the first and second transistors being coupled in series. One of the first and second transistors is a P channel transistor and the other is an N channel transistor. An electronic device may include one or more of the pixels.

Photoelectric conversion apparatus including semiconductor layer includes pixel array region and peripheral region. The semiconductor layer has first and second faces. Each pixel includes first semiconductor region of first conductivity type arranged on the first face side and second semiconductor region of second conductivity type arranged on the second face side, and predetermined voltage causing avalanche multiplication operation is supplied between the first semiconductor region and the second semiconductor region. The peripheral region includes third semiconductor region of the first conductivity type arranged on the first face side, fourth semiconductor region of the second conductivity type arranged apart from the third semiconductor region, and fifth semiconductor region of the first conductivity type arranged, close to the third semiconductor region, between the third semiconductor region and the fourth semiconductor region.

Pixels, such as for image sensors and electronic devices, include a photodiode formed in a semiconductor substrate, a floating diffusion, and a transfer structure selectively coupling the photodiode to the floating diffusion. The transfer structure includes a transfer gate formed on the semiconductor substrate, and a vertical channel structure including spaced apart first doped regions formed in the semiconductor substrate between the transfer gate and the photodiode. Each spaced apart first doped region is doped at a first dopant concentration with a first-type dopant. The spaced apart first doped regions are formed in a second doped region doped at a second dopant concentration with a second-type dopant of a different conductive type.

A photoelectric conversion apparatus includes a first semiconductor layer having a photoelectric conversion element, a second semiconductor layer including circuitry for processing a signal based on a charge obtained by the photoelectric conversion element, a first wiring structure electrically connected to the first semiconductor layer, a second wiring structure electrically connected to the second semiconductor layer, and a coupling part that couples the first wiring structure to the second wiring structure. In a plan view, the apparatus includes a pixel region having the photoelectric conversion element, and a peripheral region located between the pixel region and an outer edge of the photoelectric conversion apparatus. The first wiring structure includes, in the peripheral region, a first conductive part having a mesh-shaped part. The first conductive part is connected to a pad facing outside the photoelectric conversion apparatus.

A photoelectric conversion apparatus includes a semiconductor layer having an avalanche photodiode, and a wiring structure electrically connected to the semiconductor layer. In a plan view, the photoelectric conversion apparatus comprises a pixel region including the avalanche photodiode, and a peripheral region located between the pixel region and an outer edge of the photoelectric conversion apparatus. A third wiring layer is located between a first wiring layer and a second wiring layer. The first wiring layer includes, in the peripheral region, a first conductive part for transmitting an anode potential of the avalanche photodiode. The second wiring layer includes, in the peripheral region, a second conductive part for transmitting a second potential different from the anode potential. The first conductive part and the second conductive part overlap in the plan view.

An image sensing device is provided to include a pixel array including unit pixel blocks that are arranged in a first direction and a second direction crossing the first direction, each unit pixel block configured to generate pixel signals in response to incident light reflected from a target object. The unit pixel block includes normal first pixel configured to receive a portion of the incident light at a first arrival time and generate a first pixel signal in response to the incident light, and a second pixel configured to receive another portion of the incident light at a second arrival time and generate a second pixel signal in response to the incident light. The second arrival time is later than the first arrival time.

An image sensor includes unit pixels of a first pixel group sharing a first floating diffusion region and associated with a single color filter, and unit pixels of a second pixel group sharing a second floating diffusion region and associated with the single color filter. Control logic may generate an image by obtaining capacitance having a first value from the first floating diffusion region at a first time, and obtaining capacitance having a second value different from the first value from the second floating diffusion region at a second time following the first time. The first pixel group and the second pixel s group have different sensitivity levels.

An image capturing apparatus includes a plurality of photoelectric conversion elements, a first selection unit, and a second selection unit. Each of the photoelectric conversion elements includes an avalanche diode and a counter. The photoelectric conversion elements have a first photoelectric conversion element and a second photoelectric conversion element. The first selection unit controls the first photoelectric conversion element. The second selection unit controls the second photoelectric conversion element. The first and second selection units are controlled by a first control line and a second control line. In a first mode, the second selection unit controls the second photoelectric conversion element to be brought into a state where no signal is read from the second photoelectric conversion element. In a second mode, the second selection unit controls the second photoelectric conversion element to be brought into a state where a signal is read from the second photoelectric conversion element.

An image sensor includes a first photodiode group, a second photodiode group, a first transfer transistor group, a second transfer transistor group, a floating diffusion region of a substrate in which electric charges generated in the first photodiode group are stored, and a power supply node for applying a power supply voltage to the second photodiode group. A barrier voltage is applied to at least one transfer transistor of the second transfer transistor group. The power supply voltage allows electric charges, generated in the second photodiode group, to migrate to the power supply node, and the barrier voltage forms a potential barrier between the second photodiode group and the floating diffusion region.