Apparatuses relating to a microelectronic package are disclosed. In one such apparatus, a substrate has first contacts on an upper surface thereof. A microelectronic die has a lower surface facing the upper surface of the substrate and having second contacts on an upper surface of the microelectronic die. Wire bonds have bases joined to the first contacts and have edge surfaces between the bases and corresponding end surfaces. A first portion of the wire bonds are interconnected between a first portion of the first contacts and the second contacts. The end surfaces of a second portion of the wire bonds are above the upper surface of the microelectronic die. A dielectric layer is above the upper surface of the substrate and between the wire bonds. The second portion of the wire bonds have uppermost portions thereof bent over to be parallel with an upper surface of the dielectric layer.

An anisotropic conductive film, capable of connecting a terminal formed on a substrate having a wavy surface such as a ceramic module substrate with conduction characteristics stably maintained, includes an insulating adhesive layer, and conductive particles regularly arranged in the insulating adhesive layer as viewed in a plan view. The conductive particle diameter is 10 μm or more, and the thickness of the film is 1 or more times and 3.5 or less times the conductive particle diameter. The variation range of the conductive particles in the film thickness direction is less than 10% of the conductive particle diameter.

A radiation detector has a photoelectric conversion element array having a light receiving unit and a plurality of bonding pads; a scintillator layer stacked on the photoelectric conversion element array; a resin frame formed on the photoelectric conversion element array so as to pass between the scintillator layer and the bonding pads away from the scintillator layer and the bonding pads and so as to surround the scintillator layer; and a protection film covering the scintillator layer and having an outer edge located on the resin frame; a first distance between an inner edge of the resin frame and an outer edge of the scintillator layer is shorter than a second distance between an outer edge of the resin frame and an outer edge of the photoelectric conversion element array; the outer edge and a groove are processed with a laser beam.

An image sensor semiconductor package (package) includes a printed circuit board (PCB) having a first surface and a second surface opposite the first surface. A complementary metal-oxide semiconductor (CMOS) image sensor (CIS) die has a first surface with a photosensitive region and a second surface opposite the first surface of the CIS die. The second surface of the CIS die is coupled with the first surface of the PCB. A transparent cover is coupled over the photosensitive region of the CIS die. An image signal processor (ISP) is embedded within the PCB. One or more electrical couplers electrically couple the CIS die with the PCB. A plurality of electrical contacts on the second surface of the PCB are electrically coupled with the CIS die and with the ISP. The ISP is located between the plurality of electrical contacts of the second surface of the PCB and the CIS die.

Implementations of a molded image sensor chip scale package may include an image sensor having a first side and a second side. A first cavity wall and a second cavity wall may be coupled to the first side of the image sensor and extend therefrom. The first cavity wall and the second cavity wall may form a cavity over the image sensor. A transparent layer may be coupled to the first cavity wall and the second cavity wall. A redistribution layer (RDL) may be coupled to the second side of the image sensor. At least one interconnect may be directly coupled to the RDL. A mold material may encapsulate a portion of the RDL, a portion of the image sensor, and a side of each cavity wall, and a portion of the transparent layer.

An image sensor including a substrate and an image sensing element is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit a contour of the arc surface. The image sensing element has a front surface and a rear surface opposite to the front surface and has at least one bonding wire, the bonding wire is connected between the front surface and the substrate, and the rear surface of the image sensing element directly contacts the arc surface. In addition, a manufacturing method of the image sensor is also provided.

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a first logic die including a first through via, an image sensor die hybrid bonded to the first logic die, and a second logic die bonded to the first logic die. A front side of the first logic die facing a front side of the image sensor die. A front side of the second logic die facing a backside of the first logic die. The second logic die comprising a first conductive pad electrically coupled to the first through via.

An electronic component comprising: an electronic substrate that includes an electronic element and a first connection terminal a package member that is disposed on the electronic substrate; and a circuit member that includes a second connection terminal, wherein the circuit member is disposed between the package member and the electronic substrate, and extends from the position between the package member and the electronic substrate outward beyond the edge of the electronic substrate; the electronic component includes a connecting member that is disposed between the circuit member and the electronic substrate, and electrically connects the second connection terminal and the first connection terminal, an adhesive member that is disposed between the circuit member and the package member, and joins the circuit member to the package member; the connecting member, the circuit member, and the adhesive member are located between the package member and the electronic substrate.

Provided is a sequencing chip. The sequencing chip includes: a chip main body, nucleic acids, and a phosphonic acid polymer film. The chip main body includes a plurality of chip particles arranged in a same layer, the chip particles are obtained by cutting a chip matrix along cutting lines of a wafer layer, and the chip matrix includes: the wafer layer having the cutting lines uniformly distributed thereon; a first silicon oxide layer made of silicon oxide and formed on an upper surface of the wafer layer; and a transition metal oxide layer made of a transition metal oxide and formed on an upper surface of the first silicon oxide layer. The nucleic acids are fixed on the transition metal oxide layer; and the phosphonic acid polymer film is made of a polyphosphonic acid polymer and formed on an upper surface of the transition metal oxide layer.

A semiconductor device and method of manufacture are provided wherein the semiconductor device includes a first system on chip device bonded to a first memory device, a second system on chip device bonded to the first memory device, a first encapsulant surrounding the first system on chip device and the second system on chip device, a second encapsulant surrounding the first system on chip device, the second system on chip device, and the first memory device, and a through via extending from a first side of the second encapsulant to a second side of the first encapsulant, the through via being located outside of the first encapsulant.