According to an aspect, a sensor packaging structure includes a sensor die having a first surface and a second surface opposite the first surface, where the sensor die defines a sensor edge disposed between the first surface and the second surface. The sensor packaging structure includes a bonding material having a first surface and a second surface opposite the second surface, where the bonding material defines a bonding material edge disposed between the first surface of the bonding material and the second surface of the bonding material. The sensor packaging structure includes a transparent material, where the bonding material couples the sensor die to the transparent material. The sealing material is disposed on an interface between the sensor die and the bonding material, and at least one of a portion of the sensor edge or a portion of the bonding material edge.

An image sensor comprises an array of sensor elements, each responsive to incident photon flux, and a readout circuit coupled electronically to the array of sensor elements and configured to release an electronic signal varying in dependence on the incident photon flux. A thermal-barrier zone separates the array of sensor elements from the readout circuit, and a solid-state cooler is coupled thermally to the array of sensor elements.

Provided is a method of fabricating an image sensor device. An exemplary includes forming a plurality of radiation-sensing regions in a substrate. The substrate has a front surface, a back surface, and a sidewall that extends from the front surface to the back surface. The exemplary method further includes forming an interconnect structure over the front surface of the substrate, removing a portion of the substrate to expose a metal interconnect layer of the interconnect structure, and forming a bonding pad on the interconnect structure in a manner so that the bonding pad is electrically coupled to the exposed metal interconnect layer and separated from the sidewall of the substrate.

A light-receiving device includes at least one pixel. The at least one pixel includes a first electrode; a second electrode; and a photoelectric conversion layer between the first electrode and the second electrode. The photoelectric conversion layer is configured to convert incident infrared light into electric charge. The photoelectric conversion layer has a first section and a second section. The first section is closer to the first electrode than the second section, and the second section is closer to the second electrode than the first section. At least one of the first section and the second section have a plurality of surfaces.

A manufacturing method of a chip package includes forming a temporary bonding layer on a carrier; forming an encapsulation layer on a top surface of a wafer or on the temporary bonding layer; bonding the carrier to the wafer, in which the encapsulation layer covers a sensor and a conductive pad of the wafer; patterning a bottom surface of the wafer to form a through hole, in which the conductive pad is exposed through the through hole; forming an isolation layer on the bottom surface of the wafer and a sidewall of the through hole; forming a redistribution layer on the isolation layer and the conductive pad that is in the through hole; forming a passivation layer on the isolation layer and the redistribution layer; and removing the temporary bonding layer and the carrier.

An apparatus according to the present invention in which a first substrate including a photoelectric conversion element and a gate electrode of a transistor, and a second substrate including a peripheral circuit portion are placed upon each other. The first substrate does not include a high-melting-metal compound layer, and the second substrate includes a high-melting-metal compound layer.

The present disclosure relates to an imaging device, an electronic device, and a manufacturing method enabling to reduce a manufacturing cost. There are provided: a first semiconductor element including an imaging element configured to generate a pixel signal; and a second semiconductor element in which a first signal processing circuit and a second signal processing circuit that are configured to process the pixel signal are embedded by an embedded member. The first signal processing circuit has a structure including at least one more layer than the second signal processing circuit. There are further provided: a first wiring line that connects the first semiconductor element and the first signal processing circuit; and a second wiring line that connects the first signal processing circuit and the second signal processing circuit. The present disclosure can be applied to an imaging device.

A package includes an interposer substrate having at least one through-substrate via (TSV) electrically connecting a top surface of the interposer substrate to a bottom surface of the interposer substrate. The package further includes at least one semiconductor die having a top side, a bottom side, and a sidewall. The at least one semiconductor die is disposed on the interposer substrate with the bottom side electrically coupled to the top surface of the interposer substrate. A molding material is disposed on at least on a portion of the at least one semiconductor die, and an array of conductive material is disposed on the bottom surface of the interposer substrate. The array of conductive material forms the external contacts of the package.

An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including, but not limited to, v-shaped, u-shaped, or other shaped features. Light sensors having such an indentation feature can redirect incident light that is not absorbed by one portion of the photosensor to another portion of the photosensor for additional absorption. In addition, the elevated photosensors reduce the size of the pixel cells while reducing leakage, image lag, and barrier problems.

A backside illuminated image sensor includes a substrate having a frontside surface and a backside surface, a charge accumulation region disposed in the substrate, and a light isolation pattern surrounding at least a portion of the charge accumulation region and comprising a metal material. The substrate has a trench extending from the backside surface toward the frontside surface, and the light isolation pattern is disposed in the trench.