An image sensor includes a plurality of pixels, each pixel including a light sensing structure including first, second and third light sensing elements sequentially stacked on a substrate, the light sensing structure having a first surface adjacent to a readout circuit and a second surface including a light receiving portion between first and second circumferential portions, a first through via on the first circumferential portion, extending from the first surface to connect with the first light sensing element, and configured to transfer charges of the first light sensing element to the readout circuit, and a vertical transfer gate on a second circumferential portion and configured to transfer charges of the second light sensing element to the readout circuit, the first through via and the vertical transfer gate of each pixel being arranged in a 1-shaped or L-shaped pattern in the first and second circumferential portions.

An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

An image sensor includes a pixel defining pattern in a mesh form. A first division pattern divides a pixel area into two halves. A second division pattern divides the pixel area into two halves. A first diagonal division pattern divides the pixel area into two halves. A second diagonal division pattern divides the pixel area into two halves. First through eighth photodiodes are arranged in the pixel area.

Provided is a photoelectric conversion device including: a photoelectric conversion portion in a substrate that photoelectrically converts incident light to generate charges; a transfer transistor including a control electrode on the substrate that transfers the charges from the photoelectric conversion portion; wiring layers above the control electrode; a first wiring in a first wiring layer of the wiring layers that is the closest to the substrate; and a drive wiring in a second wiring layer above the first wiring layer, a control signal for controlling the transfer transistor being transferred to the control electrode via the drive wiring and first wiring and, in a plan view, at least part of the first wiring overlapping with at least part of the control electrode and at least part of an edge of the first wiring extending along an edge of the control electrode on a side facing the photoelectric conversion portion.

An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.

An image sensor package includes an image sensor chip on a package substrate, a logic chip on the package substrate and perpendicularly overlapping the image sensor chip, and a memory chip on the package substrate and perpendicularly overlapping the image sensor chip and logic chip. The logic chip processes a pixel signal output from the image sensor chip. The memory chip is electrically connected to the image sensor chip through a conductive wire and stores at least one of the pixel signal from the image sensor chip or a pixel signal processed by the logic chip. The memory chip receives the pixel signal output from the image sensor chip through the conductive wire and receives the pixel signal processed by the logic chip through the image sensor chip and the conductive wire.

In one example, an imaging device including a plurality of pixel circuits, a first control line, a second control line, a first voltage supply line, a second voltage supply line, a first light-receiving element, and a diagnosis unit is disclosed. The pixel circuits each include a first terminal, a second terminal, a third terminal, an accumulation unit, a first transistor, a second transistor, and an output unit. The first transistor is couples the third terminal to the accumulation unit on the basis of a voltage of the first terminal. The second transistor supplies a predetermined voltage to the accumulation unit on the basis of a voltage of the second terminal. The output unit outputs a signal corresponding to a voltage in the accumulation unit.

A method includes forming a first substrate including a first dielectric layer and a first metal pad, forming a second substrate including a second dielectric layer and a second metal pad, and bonding the first dielectric layer to the second dielectric layer, and the first metal pad to the second metal pad. One or both of the first and second substrates is formed by forming a first insulating layer, forming an opening in the layer, forming a barrier on an inner surface of the opening, forming a metal pad material on the barrier, polishing the metal pad material to expose a portion of the barrier and to form a gap, expanding the gap, forming a second insulating layer to fill the opening and the gap, and polishing the insulating layers such that a top surface of the metal pad is substantially planar with an upper surface of the polished layer.

There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.

There is provided an imaging element includes a photoelectric conversion unit that includes a first electrode, a photoelectric conversion layer, and a second electrode, in which the photoelectric conversion unit further includes a charge storage electrode that has an opposite region opposite to the first electrode via an insulating layer, and a transfer control electrode that is opposite to the first electrode and the charge storage electrode via the insulating layer, and the photoelectric conversion layer is disposed above at least the charge storage electrode via the insulating layer.