Patent classifications
H01L27/1464
IMAGING ELEMENT AND IMAGING DEVICE
An imaging element is disclosed that includes: a semiconductor substrate; a multilayer wiring layer; a plurality of structures; and a light reflecting layer. The semiconductor substrate has a first surface as a light incidence surface and a second surface opposite to the first surface. A light receiving section of the semiconductor substrate generates electric charge through photoelectric conversion. The multilayer wiring layer has a plurality of wiring layers and is on the second surface side of the semiconductor substrate. The plurality of structures is in the multilayer wiring layer. The light reflecting layer is in the multilayer wiring layer, and forms a reflective region or a non-reflective region in a region with the interlayer insulating layer interposed in between. The region has none of the structures formed therein. The reflective region and the non-reflective region are substantially symmetrical with respect to the optical center of the pixel.
IMAGING ELEMENT AND ELECTRONIC DEVICE
The present technology relates to an imaging element and an electronic device capable of preventing light from leaking into an adjacent pixel. A semiconductor layer in which a first pixel in which a read pixel signal is used to generate an image, and a second pixel in which the read pixel signal is not used to generate an image are arranged, and a wiring layer stacked on the semiconductor layer are provided, and a structure of the first pixel and a structure of the second pixel are different. A first inter-pixel separation portion that separates the semiconductor layer of the adjacent first pixels, and a second inter-pixel separation portion that separates the semiconductor layer of the adjacent second pixels are further provided, and the first inter-pixel separation portion and the second inter-pixel separation portion are provided with different structures. The present technology can be applied to an imaging element in which dummy pixels are arranged.
Solid-state imaging element and imaging apparatus
A solid-state imaging element of a pixel sharing type with improved driving of transistors is disclosed. A first electric charge accumulating section and a second electric charge accumulating section are arranged in a predetermined direction. A first transfer section transfers electric charge from first photoelectric conversion elements to the first electric charge accumulating section, causing it to accumulate the electric charge. A second transfer section transfers electric charge from second photoelectric conversion elements to the second electric charge accumulating section, causing it to accumulate the electric charge. A first transistor is configured to output a signal corresponding to an amount of the electric charge accumulated in each of the first electric charge accumulating section and the second electric charge accumulating section. A second transistor is arranged with the first transistor in the predetermined direction and connected in parallel to the first transistor.
Solid-state imaging device and electronic equipment
The present technology relates to a solid-state imaging device and electronic equipment to suppress degradation of Dark characteristics. A photoelectric converting unit configured to perform photoelectric conversion, and a PN junction region including a P-type region and an N-type region on a side of a light incident surface of the photoelectric converting unit are included. Further, on a vertical cross-section, the PN junction region is formed at three sides including a side of the light incident surface among four sides enclosing the photoelectric converting unit. Further, a trench which penetrates through a semiconductor substrate in a depth direction and which is formed between the photoelectric converting units each formed at adjacent pixels is included, and the PN junction region is also provided on a side wall of the trench. The present technology can be applied, for example, to a backside irradiation type CMOS image sensor.
IMAGE SENSOR INTEGRATED CHIP AND METHOD FOR FORMING THE SAME
The disclosure provides an image sensor integrated chip and a method for forming the same. The image sensor integrated chip includes a substrate, an isolation structure, an image sensing element, a gate structure, a first dielectric layer, and a reflective layer. The substrate includes a pixel region. The isolation structure is disposed in the substrate and is configured at opposite sides of the pixel region. The image sensing element is disposed in the pixel region of the substrate. The gate structure is disposed on the pixel region of the substrate. The first dielectric layer is disposed above the pixel region of the substrate and covers sidewalls and a portion of a top surface of the gate structure. The reflective layer is disposed on the first dielectric layer. The reflective layer overlaps with the image sensing element and the portion of the top surface of the gate structure in a first direction perpendicular to a surface of the substrate.
IMAGE SENSOR, CAMERA MODULE INCLUDING THE IMAGE SENSOR, ELECTRONIC DEVICE INCLUDING THE CAMERA MODULE, AND METHOD OF MANUFACTURING THE IMAGE SENSOR
An image sensor includes a pixel division structure, a light sensing element, a color filter array layer and a microlens. The pixel division structure extends through a substrate in a vertical direction, and defines unit pixel regions. The light sensing element is in each unit pixel region. The color filter array layer including color filters is on the substrate. The microlens is on the color filter array layer. The pixel division structure includes a core and a lateral pattern structure on a sidewall thereof. The core includes a first filling pattern including polysilicon doped with impurities at a first concentration and a second filling pattern in a space formed by the first filling pattern. A sidewall of the second filling pattern is covered by the first filling pattern, and the second filling pattern includes polysilicon doped with impurities at a second concentration different from the first concentration.
PHOTOELECTRIC CONVERSION APPARATUS AND PHOTOELECTRIC CONVERSION SYSTEM
Photoelectric conversion apparatus including semiconductor layer includes pixel array region and peripheral region. The semiconductor layer has first and second faces. Each pixel includes first semiconductor region of first conductivity type arranged on the first face side and second semiconductor region of second conductivity type arranged on the second face side, and predetermined voltage causing avalanche multiplication operation is supplied between the first semiconductor region and the second semiconductor region. The peripheral region includes third semiconductor region of the first conductivity type arranged on the first face side, fourth semiconductor region of the second conductivity type arranged apart from the third semiconductor region, and fifth semiconductor region of the first conductivity type arranged, close to the third semiconductor region, between the third semiconductor region and the fourth semiconductor region.
PHOTOELECTRIC CONVERSION DEVICE, PHOTOELECTRIC CONVERSION SYSTEM, AND EQUIPMENT
A photoelectric conversion device includes a connecting portion that electrically connects a contact plug of anode wiring and the second semiconductor region of the isolation portion. The connecting portion includes a third semiconductor region of the second conducting type that is connected to the contact plug of the anode wiring, and a fourth semiconductor region of the second conducting type that is disposed between the third semiconductor region and the second semiconductor region. The impurity concentration of the third semiconductor region is higher than the impurity concentration of the second semiconductor region and the impurity concentration of the fourth semiconductor region is lower than the impurity concentration of the third semiconductor region. With respect to a direction in which the APDs are arrayed, the width of the isolation portion is smaller than the width of the connecting portion.
High Dynamic Range, Backside-illuminated, Low Crosstalk Image Sensor with Walls Between Silicon Surface and First Layer Metal to Isolate Photodiodes
A backside-illuminated image sensor includes arrayed photodiodes separated by isolation structures, and interlayer dielectric between first layer of metal interconnect and substrate. The image sensor has barrier metal walls in the interlayer dielectric between isolation structures and first layer interconnect, the barrier metal walls aligned with the isolation structures and disposed between the isolation structures and first layer interconnect. The barrier metal wall deflects light passing through photodiodes of the sensor that would otherwise be reflected by interconnect into different photodiodes. The sensor is formed by providing a partially fabricated semiconductor substrate with photodiodes and source-drain regions formed; forming gate electrodes on a frontside surface of the semiconductor substrate, depositing an etch-stop layer over the gate electrodes; depositing interlayer dielectric on the etch-stop layer; forming trenches extending to the etch-stop layer through the interlayer dielectric, the trenches being between photodiodes; and filling trenches with metal to form barrier metal walls.
Image sensing device
An image sensing device is provided to include a pixel array including unit pixel blocks that are arranged in a first direction and a second direction crossing the first direction, each unit pixel block configured to generate pixel signals in response to incident light reflected from a target object. The unit pixel block includes normal first pixel configured to receive a portion of the incident light at a first arrival time and generate a first pixel signal in response to the incident light, and a second pixel configured to receive another portion of the incident light at a second arrival time and generate a second pixel signal in response to the incident light. The second arrival time is later than the first arrival time.