An image sensor may include an array of image sensor pixels. Each image sensor pixel in the array may be a global shutter pixel that includes first transistors and second transistors that are substantially larger than the first transistors. The second transistors may receive row control signals from peripheral row drivers formed at the edge of the array. Each pixel may further include local driver circuits interposed between the peripheral row drivers and the second transistors. Each local driver circuit may include a pull-down transistor for driving a row control signal low and a pull-up transistor for driving the row control signal high. Each local driver may optionally be shared among two or more adjacent pixels in a given row. The local drivers help reduce the total capacitive loading at the output of the peripheral row drivers and can therefore help improve row driver performance and minimize integration time.

An image sensor may include image pixels arranged in rows and columns. The image pixels may include respective overflow transistors and overflow capacitors and be configured to generate overflow charge during image acquisition. The overflow charge may be generated in a rolling manner on a row-to-row basis by repeatedly activating the overflow transistors and transfer transistors. Row control circuitry may be configured to provide a final synchronous overflow and transfer transistor activation across all of the pixel rows to provide a uniform overflow charge integration time period across all of the pixel rows. Row control circuitry may include a control signal generation circuit configured to generate control signals having full assertions in a first mode and partial assertions for the final synchronous overflow and transfer transistor activation in a second mode.

A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.

A semiconductor device includes a semiconductor substrate, a radiation-sensing region, at least one isolation structure, and a doped passivation layer. The radiation-sensing region is present in the semiconductor substrate. The isolation structure is present in the semiconductor substrate and adjacent to the radiation-sensing region. The doped passivation layer at least partially surrounds the isolation structure in a substantially conformal manner.

A solid-state image sensor includes a pixel array including pixel cells arranged in a matrix. Each of the pixel cells includes an avalanche photodiode, a floating diffusion which accumulates charges, a transfer transistor which connects a cathode of the avalanche photodiode to the floating diffusion, a first reset transistor for resetting charges collected in the cathode of the avalanche photodiode, a second reset transistor for resetting charges accumulated in the floating diffusion, an amplification transistor for converting a charge amount of charges accumulated in the floating diffusion into a voltage, a memory which accumulates charges, and a count transistor which connects the floating diffusion to the memory.

A pixel structure of an image sensor is provided and includes following units. A crystalline layer of a first doping type is formed on a substrate. A photodiode region is formed in the crystalline layer. A gate of a source follower transistor is formed on a top surface of the crystalline layer. A reset gate is formed on the top surface of the crystalline layer. A doped region of a second doping type is formed in the crystalline layer and formed between the reset gate and the gate of the source follower. The first doping type is different from the second doping type, and the photodiode region is connected to the doped region under the top surface of the crystalline layer as an anti-blooming path.

A pixel structure of an image sensor is provided and includes following units. A crystalline layer of a first doping type is formed on a substrate. A photodiode region is formed in the crystalline layer. A gate of a source follower transistor is formed on a top surface of the crystalline layer. A reset gate is formed on the top surface of the crystalline layer. A doped region of a second doping type is formed in the crystalline layer and formed between the reset gate and the gate of the source follower. The first doping type is different from the second doping type, and the photodiode region is connected to the doped region under the top surface of the crystalline layer as an anti-blooming path.

An imaging device may have an array of image sensor pixels each having a photodiode and a floating diffusion node. Each image sensor pixel in the array may also include a dual conversion gain switch and a dual conversion gain capacitor that allows the image sensor pixel to operate in a low conversion gain mode during which the switch is turned on to share charge between the floating diffusion node and the dual conversion gain capacitor, and a high conversion gain mode in which the switch is turned off. During integration, the photodiode may generate more charge than can be held at the floating diffusion node. A buried channel may be provided beneath the dual conversion gain switch to provide a path along which the excess charge can be shared between the floating diffusion node and the dual conversion gain capacitor even when the dual conversion gain switch is off.

A semiconductor device includes a semiconductor substrate, a radiation-sensing region, at least one isolation structure, and a doped passivation layer. The radiation-sensing region is present in the semiconductor substrate. The isolation structure is present in the semiconductor substrate and adjacent to the radiation-sensing region. The doped passivation layer at least partially surrounds the isolation structure in a substantially conformal manner.

An imaging device may have an array of image sensor pixels. Each image sensor pixel of the array of image sensor pixels may have split photodiodes that are symmetric about a shared floating diffusion region. The floating diffusion region may be coupled to each of the photodiodes. Each of the split photodiodes and the floating diffusion region may generate charge in response to light incident on the image sensor pixel. The split photodiodes and the floating diffusion region may be covered by a microlens. The charge generated by the photodiodes and the floating diffusion region may be compared and utilized by the imaging device in phase detection applications. The image sensor pixel may also include a dual conversion gain capacitor and a gain select transistor to produce high dynamic range (HDR) images.