Patent classifications
H01L27/14689
IMAGE SENSING DEVICE
A method for manufacturing an image sensing device includes forming a first photoelectric conversion region in a semiconductor substrate, forming a recess region to extend in a direction from a surface of the semiconductor substrate toward an inside of the semiconductor substrate, arranging a mask in a portion of the recess region, forming a second photoelectric conversion region through the recess region, and forming a recess gate in the recess region. A thickness of the second photoelectric conversion region is based on a depth of the recess gate that is measured from the surface of the semiconductor substrate to a bottom surface of the recess gate.
RANGING IMAGE SENSOR AND METHOD FOR MANUFACTURING SAME
A ranging image sensor includes a semiconductor layer and an electrode layer. The semiconductor layer and the electrode layer form a plurality of pixels. Each of the plurality of pixels includes an avalanche multiplication region, a charge distribution region, a first charge transfer region, and a second charge transfer region in the semiconductor layer. Each of the plurality of pixels includes a photogate electrode, a first transfer gate electrode, and a second transfer gate electrode in the electrode layer. The avalanche multiplication region is continuous over the plurality of pixels or reaches a trench formed in the semiconductor layer so as to separate the plurality of pixels from each other.
Image pickup device and method for manufacturing image pickup device
An image pickup device having a pixel region in which pixels are arranged, and in which a multilayer wiring structure is disposed. Each pixel includes a photoelectric conversion unit, a charge accumulation unit, a floating diffusion, a light shielding portion covering the charge accumulation unit and opening above the photoelectric conversion unit, and a waveguide which overlaps at least partially a portion at which the light shielding portion opens in a plan view. The device includes an insulating film disposed below the optical waveguide. The insulating film has a refractive index higher than that of an interlayer insulating film. The insulating film is disposed closer to the photoelectric conversion unit than to the lowermost wiring layer among wiring layers of the multilayer wiring structure. The insulating film extends to a portion above the light shielding portion. The insulating film is wider than a lower portion of the optical waveguide.
Image sensor including light shielding layer and patterned dielectric layer
An image sensor including a semiconductor substrate, a plurality of color filters, a plurality of first lenses and a second lens is provided. The semiconductor substrate includes a plurality of sensing pixels arranged in array, and each of the plurality of sensing pixels respectively includes a plurality of image sensing units and a plurality of phase detection units. The color filters at least cover the plurality of image sensing units. The first lenses are disposed on the plurality of color filters. Each of the plurality of first lenses respectively covers one of the plurality of image sensing units. The second lens is disposed on the plurality of color filters and the second lens covers the plurality of phase detection units.
Metal reflector grounding for noise reduction in light detector
The problem of reducing noise in image sensing devices, especially NIR detectors, is solved by providing ground connections for the reflectors. The reflectors may be grounded through vias that couple the reflectors to grounded areas of the substrate. The grounded areas of the substrate may be P+ doped areas formed proximate the surface of the substrate. In particular, the P+ doped areas may be parts of photodiodes. Alternatively, the reflectors may be grounded through a metal interconnect structure formed over the front side of the substrate.
Method of forming shallow trench isolation (STI) structure for suppressing dark current
A method of fabricating a target shallow trench isolation (STI) structure between devices in a wafer-level image sensor having a large number of pixels includes etching a trench, the trench having a greater depth and width than a target STI structure and epitaxially growing the substrate material in the trench for a length of time necessary to provide the target depth and width of the isolation structure. An STI structure formed in a semiconductor substrate includes a trench etched in the substrate having a depth and width greater than that of the STI structure, and semiconductor material epitaxially grown in the trench to provide a critical dimension and target depth of the STI structure. An image sensor includes a semiconductor substrate, a photodiode region, a pixel transistor region and an STI structure between the photodiode region and the pixel transistor region.
LIGHT RECEIVING ELEMENT AND LIGHT RECEIVING DEVICE
A light receiving element including: a semiconductor substrate; a photoelectric conversion unit (PD) in the semiconductor substrate that converts light into electric charges; a first electric charge accumulation unit (MEM) in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit; a first distribution gate on a front surface of the semiconductor substrate that distributes the electric charges from the photoelectric conversion unit to the first electric charge accumulation unit; a second electric charge accumulation unit (MEM) in the semiconductor substrate to which the electric charges are transferred from the photoelectric conversion unit; and a second distribution gate on the front surface of the semiconductor substrate that distributes the electric charges from the photoelectric conversion unit to the second electric charge accumulation unit, in which the first and second distribution gates each have a pair of buried gate portions.
Complementary metal-oxide-semiconductor image sensor and method of making
A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a floating diffusion node in the protrusion. The pixel further includes a gate structure over the bulk, wherein a top surface of the gate structure is above a top surface of the floating diffusion node. The pixel further includes a photosensitive device in the bulk. The pixel further includes an isolation well surrounding the photosensitive device.
BURIED CHANNEL TRANSISTOR STRUCTURES AND PROCESSES
Transistors include trenches formed in the semiconductor substrate having a first conductive type. The trenches define, in a channel width plane of the transistor, at least one nonplanar substrate structure having a plurality of sidewall portions and a tip portion disposed between the plurality of sidewall portions. An epitaxial overlayer is epitaxially grown on the sidewall portions and the tip portion. A channel doping layer having a doped portion of the semiconductor substrate is formed in the nonplanar substrate structure and enclosed by the epitaxial overlayer. An isolation layer is disposed in the trenches and over the epitaxial overlayer. A gate is disposed on the isolation layer and extends into the trenches.
Photoelectric conversion element and solid-state imaging device
A photoelectric conversion element according to an embodiment of the present disclosure includes: a first electrode and a second electrode facing each other; and a photoelectric conversion layer provided between the first electrode and the second electrode, and including a first organic semiconductor material, a second organic semiconductor material, and a third organic semiconductor material that have mother skeletons different from one another. The first organic semiconductor material is one of fullerenes and fullerene derivatives. The second organic semiconductor material in a form of a single-layer film has a higher linear absorption coefficient of a maximal light absorption wavelength in a visible light region than a single-layer film of the first organic semiconductor material and a single-layer film of the third organic semiconductor material. The third organic semiconductor material has a value equal to or higher than a HOMO level of the second organic semiconductor material.