A solid-state imaging device includes first through third substrates. The first substrate includes a first semiconductor substrate and a first multi-layered wiring layer stacked thereon. The second substrate includes a second semiconductor substrate and a second multi-layered wiring layer stacked thereon. The third substrate includes a third semiconductor substrate and a third multi-layered wiring layer stacked thereon. A coupling structure for electrically coupling at least two of the first through third substrates includes a via. The via exposes a predetermined wiring line in the second multi-layered wiring layer while exposing a portion of a predetermined wiring line in the first multi-layered wiring layer from a back surface side of the first substrate, or exposes a predetermined wiring line in the third multi-layered wiring layer while exposing a portion of the predetermined wiring line in the first multi-layered wiring layer or the second multi-layered wiring layer from the back surface.

An image sensor including a substrate and an image sensing element is provided. The substrate has an arc surface. The image sensing element is disposed on the arc surface and curved to fit a contour of the arc surface. The image sensing element has a front surface and a rear surface opposite to the front surface and has at least one bonding wire, the bonding wire is connected between the front surface and the substrate, and the rear surface of the image sensing element directly contacts the arc surface. In addition, a manufacturing method of the image sensor is also provided.

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a first logic die including a first through via, an image sensor die hybrid bonded to the first logic die, and a second logic die bonded to the first logic die. A front side of the first logic die facing a front side of the image sensor die. A front side of the second logic die facing a backside of the first logic die. The second logic die comprising a first conductive pad electrically coupled to the first through via.

The present disclosure relates to an image pickup device and an electronic apparatus that enable further downsizing of device size. The device includes: a first structural body and a second structural body that are layered, the first structural body including a pixel array unit, the second structural body including an input/output circuit unit, and a signal processing circuit; a first through-via, a signal output external terminal, a second through-via, and a signal input external terminal that are arranged below the pixel array, the first through-via penetrating through a semiconductor substrate constituting a part of the second structural body, the second through-via penetrating through the semiconductor substrate; a substrate connected to the signal output external terminal and the signal input external terminal; and a circuit board connected to a first surface of the substrate. The present disclosure can be applied to, for example, the image pickup device, and the like.

A wide dynamic range with single exposure is achieved. A solid-state imaging device according to an embodiment includes a first substrate including a photoelectric conversion element, and a second substrate including a capacitor positioned on a side opposite to a surface of incidence of light to the photoelectric conversion element in the first substrate, and configured to accumulate a charge transferred from the photoelectric conversion element.

A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The semiconductor structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first oxide layer formed below the a first substrate, a first bonding layer formed below the first oxide layer, and a first bonding via formed through the first bonding layer and the first oxide layer. The second semiconductor device includes a second oxide layer formed over a second substrate, a second bonding layer formed over the second oxide layer, and a second bonding via formed through the second bonding layer and the second oxide layer. The semiconductor structure also includes a bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.

An optoelectronic device manufacturing method, including the following successive steps: transferring an active inorganic photosensitive diode stack on an integrated control circuit previously formed inside and on top of a semiconductor substrate; and forming a plurality of organic light-emitting diodes on the active photosensitive diode stack.

An imaging device according to an embodiment of the present disclosure includes: a first substrate; a second substrate; a through wiring line; and an electrically conducive film. The first substrate includes a photoelectric conversion section and a first transistor in a first semiconductor substrate. The photoelectric conversion section and the first transistor are included in a sensor pixel. The second substrate is stacked on the first substrate and includes a second transistor and an opening in a second semiconductor substrate. The second transistor is included in the sensor pixel. The opening extends through the second semiconductor substrate in a stack direction. The through wiring line extends through the opening. The through wiring line electrically couples the first substrate and the second substrate. The electrically conducive film is provided at least between the second semiconductor substrate and the through wiring line. The electrically conducive film is coupled to a fixed potential.

An imaging device according to an embodiment of the present disclosure includes: a first substrate; a second substrate; and a through wiring line. The first substrate includes a photoelectric conversion section and a first transistor in a first semiconductor substrate. The photoelectric conversion section and the first transistor are included in a sensor pixel. The second substrate is stacked on the first substrate and includes a second transistor and an opening that extends through a second semiconductor substrate. The second substrate has an adjuster on at least one of a side surface of the opening near a gate of the second transistor or a region of a surface opposed to the first transistor. The second transistor is included in the sensor pixel. The adjuster adjusts a threshold voltage of the second transistor. The through wiring line is in the opening and electrically couples the first substrate and the second substrate.

An imaging device according to an embodiment of the present disclosure includes: a first substrate including a sensor pixel that performs photoelectric conversion; a second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel; and a third substrate including a processing circuit that performs signal processing on the pixel signal. The first substrate, the second substrate, and the third substrate are stacked in this order, and a concentration of electrically-conductive type impurities in a region on side of the first substrate is higher than a concentration of electrically-conductive type impurities in a region on side of the third substrate, in at least one or more semiconductor layers in which a field-effect transistor of the pixel circuit is provided.